From patchwork Fri May 23 04:40:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 4228261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4D60FBF90B for ; Fri, 23 May 2014 06:02:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7A01F20386 for ; Fri, 23 May 2014 06:02:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9AB762034B for ; Fri, 23 May 2014 06:02:40 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WniWZ-0002Os-83; Fri, 23 May 2014 06:00:11 +0000 Received: from mail-by2lp0236.outbound.protection.outlook.com ([207.46.163.236] helo=na01-by2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WniWV-0001M9-P3 for linux-arm-kernel@lists.infradead.org; Fri, 23 May 2014 06:00:08 +0000 Received: from BY2PR03CA030.namprd03.prod.outlook.com (10.242.234.151) by BY2PR03MB425.namprd03.prod.outlook.com (10.141.141.139) with Microsoft SMTP Server (TLS) id 15.0.944.11; Fri, 23 May 2014 05:59:43 +0000 Received: from BN1BFFO11FD034.protection.gbl (2a01:111:f400:7c10::1:161) by BY2PR03CA030.outlook.office365.com (2a01:111:e400:2c2c::23) with Microsoft SMTP Server (TLS) id 15.0.944.11 via Frontend Transport; Fri, 23 May 2014 05:59:43 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.1) by BN1BFFO11FD034.mail.protection.outlook.com (10.58.144.97) with Microsoft SMTP Server (TLS) id 15.0.949.9 via Frontend Transport; Fri, 23 May 2014 05:59:43 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s4N5xd8a005283; Thu, 22 May 2014 22:59:40 -0700 From: Huang Shijie To: Subject: [PATCH 1/2 rebased] serial: imx: remove the DMA wait queue Date: Fri, 23 May 2014 12:40:40 +0800 Message-ID: <1400820040-21396-1-git-send-email-b32955@freescale.com> X-Mailer: git-send-email 1.7.8 In-Reply-To: <1400819575-20435-1-git-send-email-b32955@freescale.com> References: <1400819575-20435-1-git-send-email-b32955@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.1; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(80022001)(44976005)(19580405001)(50986999)(77982001)(76482001)(6806004)(19580395003)(33646001)(83322001)(4396001)(74662001)(93916002)(77096999)(76176999)(87286001)(89996001)(31966008)(88136002)(62966002)(21056001)(81342001)(87936001)(81542001)(50226001)(26826002)(83072002)(79102001)(48376002)(102836001)(74502001)(47776003)(92726001)(99396002)(64706001)(92566001)(77156001)(50466002)(36756003)(20776003)(46102001)(85852003)(42262001); DIR:OUT; SFP:; SCL:1; SRVR:BY2PR03MB425; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:gate-tx3.freescale.com; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 0220D4B98D Received-SPF: Fail (: domain of freescale.com does not designate 192.88.168.1 as permitted sender) receiver=; client-ip=192.88.168.1; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.1) smtp.mailfrom=shijie.huang@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140522_230007_885062_11038F32 X-CRM114-Status: GOOD ( 12.89 ) X-Spam-Score: -0.7 (/) Cc: linux-arm-kernel@lists.infradead.org, Huang Shijie , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The DMA wait queue makes the code very complicated: For RX, the @->stop_rx hook does not really stop the RX; For TX, the @->stop_tx hook does not really stop the TX. The above make the imx_shutdown has to wait the RX/TX DMA to be finished. In order to make code more simple, this patch removes the DMA wait queue. By calling the dmaengine_terminate_all, this patch makes the RX stops immediately after we call the @->stop_rx hook, so does the TX. Signed-off-by: Huang Shijie --- rebase this patch on the linux-next. --- drivers/tty/serial/imx.c | 42 ++++++++++++++---------------------------- 1 files changed, 14 insertions(+), 28 deletions(-) diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index febf400..366f169 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -225,7 +225,6 @@ struct imx_port { void *rx_buf; unsigned int tx_bytes; unsigned int dma_tx_nents; - wait_queue_head_t dma_wait; }; struct imx_port_ucrs { @@ -416,12 +415,10 @@ static void imx_stop_tx(struct uart_port *port) return; } - /* - * We are maybe in the SMP context, so if the DMA TX thread is running - * on other cpu, we have to wait for it to finish. - */ - if (sport->dma_is_enabled && sport->dma_is_txing) - return; + if (sport->dma_is_enabled && sport->dma_is_txing) { + dmaengine_terminate_all(sport->dma_chan_tx); + sport->dma_is_txing = 0; + } temp = readl(sport->port.membase + UCR1); writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1); @@ -435,12 +432,10 @@ static void imx_stop_rx(struct uart_port *port) struct imx_port *sport = (struct imx_port *)port; unsigned long temp; - /* - * We are maybe in the SMP context, so if the DMA TX thread is running - * on other cpu, we have to wait for it to finish. - */ - if (sport->dma_is_enabled && sport->dma_is_rxing) - return; + if (sport->dma_is_enabled && sport->dma_is_rxing) { + dmaengine_terminate_all(sport->dma_chan_rx); + sport->dma_is_rxing = 0; + } temp = readl(sport->port.membase + UCR2); writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2); @@ -497,12 +492,6 @@ static void dma_tx_callback(void *data) dev_dbg(sport->port.dev, "we finish the TX DMA.\n"); uart_write_wakeup(&sport->port); - - if (waitqueue_active(&sport->dma_wait)) { - wake_up(&sport->dma_wait); - dev_dbg(sport->port.dev, "exit in %s.\n", __func__); - return; - } } static void imx_dma_tx(struct imx_port *sport) @@ -875,10 +864,6 @@ static void imx_rx_dma_done(struct imx_port *sport) writel(temp, sport->port.membase + UCR1); sport->dma_is_rxing = 0; - - /* Is the shutdown waiting for us? */ - if (waitqueue_active(&sport->dma_wait)) - wake_up(&sport->dma_wait); } /* @@ -1025,8 +1010,6 @@ static void imx_enable_dma(struct imx_port *sport) { unsigned long temp; - init_waitqueue_head(&sport->dma_wait); - /* set UCR1 */ temp = readl(sport->port.membase + UCR1); temp |= UCR1_RDMAEN | UCR1_TDMAEN | UCR1_ATDMAEN | @@ -1218,10 +1201,13 @@ static void imx_shutdown(struct uart_port *port) unsigned long flags; if (sport->dma_is_enabled) { - /* We have to wait for the DMA to finish. */ - wait_event(sport->dma_wait, - !sport->dma_is_rxing && !sport->dma_is_txing); + /* + * The upper layer may does not call the @->stop_tx and + * @->stop_rx, so we call them ourselves. + */ + imx_stop_tx(port); imx_stop_rx(port); + imx_disable_dma(sport); imx_uart_dma_exit(sport); }