From patchwork Fri May 23 13:57:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 4232881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8C71F9F32B for ; Fri, 23 May 2014 14:02:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 91BDE20295 for ; Fri, 23 May 2014 14:02:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C3C832037A for ; Fri, 23 May 2014 14:01:59 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wnq0O-0001Aw-8x; Fri, 23 May 2014 13:59:28 +0000 Received: from mail-wi0-f169.google.com ([209.85.212.169]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wnpzg-0000n3-W6 for linux-arm-kernel@lists.infradead.org; Fri, 23 May 2014 13:58:45 +0000 Received: by mail-wi0-f169.google.com with SMTP id hi2so1140158wib.4 for ; Fri, 23 May 2014 06:58:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nX+pi9DeISSqu/tBmB6huxdi0KiIdowVzPeIfTJDn+8=; b=bZoZiiEuWTkerEJJSDLlffp6pkzNv9agcmdPa3v9QpTes1DZxt8OZsX9AHloAf0HuG UELsxCA2X373tx4kIG9BvwGG40dUc7wu1DGYRQdH/yYMe6P86UYPsHBXT3mlloyAiscR gFcrVRl14X26MI2hhH17maOhPQ6Tyr6GnaPkAdt+fbyraooEqmpYjoQd67NoobDy7284 9XDlKCjNBH8uuqaFzFHSt09y2Bkp5U25u50OUqye2QIUBVRAwRo2ehdZcXV1xWli3/PK sAASfoZUJPspIjrMa976sYHnPG83tEDgYJXIqpRPMbRKarPQHD+tXivGcVzHlQVg5ZwM z8tg== X-Gm-Message-State: ALoCoQlYeB3ufKgmsTagEszpe5y2ogUAq3C4sA8bbpgH9Dew5Oc5PzMOFPy555AQftc06eksvjH3 X-Received: by 10.180.105.72 with SMTP id gk8mr3489134wib.32.1400853502449; Fri, 23 May 2014 06:58:22 -0700 (PDT) Received: from sundance.lan (cpc4-aztw19-0-0-cust157.18-1.cable.virginm.net. [82.33.25.158]) by mx.google.com with ESMTPSA id l4sm4016261wjf.14.2014.05.23.06.58.20 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 May 2014 06:58:21 -0700 (PDT) From: Daniel Thompson To: Jason Wessel Subject: [RFC v2 04/10] ARM: vexpress: Extend UART with FIQ support Date: Fri, 23 May 2014 14:57:52 +0100 Message-Id: <1400853478-5824-5-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1400853478-5824-1-git-send-email-daniel.thompson@linaro.org> References: <1400083125-1464-1-git-send-email-daniel.thompson@linaro.org> <1400853478-5824-1-git-send-email-daniel.thompson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140523_065845_360496_C82D3009 X-CRM114-Status: GOOD ( 12.80 ) X-Spam-Score: -0.7 (/) Cc: Mark Rutland , kernel@stlinux.com, kgdb-bugreport@lists.sourceforge.net, Linus Walleij , Jiri Slaby , Daniel Thompson , Dirk Behme , Russell King , Nicolas Pitre , Ian Campbell , Anton Vorontsov , "David A. Long" , linux-serial@vger.kernel.org, Catalin Marinas , kernel-team@android.com, devicetree@vger.kernel.org, linaro-kernel@lists.linaro.org, Pawel Moll , patches@linaro.org, Kumar Gala , Rob Herring , John Stultz , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Colin Cross , Frederic Weisbecker , Christoffer Dall X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch provides the UART with a second interrupt resource that can be used to route the UARTs interrupt to FIQ. The size of the interrupt map is doubled and new mappings for the FIQ shadows added (demarked by setting bit 7 in the final item in the tuple). Signed-off-by: Daniel Thompson Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Russell King Cc: devicetree@vger.kernel.org --- arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 8 ++++---- arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 10 ++++++++-- arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 8 +++++++- arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 10 ++++++++-- 4 files changed, 27 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index ac870fb..e86936c 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -140,7 +140,7 @@ v2m_serial0: uart@090000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; - interrupts = <5>; + interrupts = <5>, <69>; clocks = <&v2m_oscclk2>, <&smbclk>; clock-names = "uartclk", "apb_pclk"; }; @@ -148,7 +148,7 @@ v2m_serial1: uart@0a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; - interrupts = <6>; + interrupts = <6>, <70>; clocks = <&v2m_oscclk2>, <&smbclk>; clock-names = "uartclk", "apb_pclk"; }; @@ -156,7 +156,7 @@ v2m_serial2: uart@0b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; - interrupts = <7>; + interrupts = <7>, <71>; clocks = <&v2m_oscclk2>, <&smbclk>; clock-names = "uartclk", "apb_pclk"; }; @@ -164,7 +164,7 @@ v2m_serial3: uart@0c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; - interrupts = <8>; + interrupts = <8>, <72>; clocks = <&v2m_oscclk2>, <&smbclk>; clock-names = "uartclk", "apb_pclk"; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index 9420053..9c489fa 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -233,7 +233,7 @@ <5 0 0 0x10000000 0x04000000>; #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; + interrupt-map-mask = <0 0 127>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, <0 0 2 &gic 0 2 4>, @@ -276,7 +276,13 @@ <0 0 39 &gic 0 39 4>, <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; + <0 0 42 &gic 0 42 4>, + + /* FIQ shadow routings */ + <0 0 69 &gic 0 5 0x84>, + <0 0 70 &gic 0 6 0x84>, + <0 0 71 &gic 0 7 0x84>, + <0 0 72 &gic 0 8 0x84>; /include/ "vexpress-v2m-rs1.dtsi" }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 15f98cb..75821d2 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -390,7 +390,13 @@ <0 0 39 &gic 0 39 4>, <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; + <0 0 42 &gic 0 42 4>, + + /* FIQ shadow routings */ + <0 0 69 &gic 0 5 0x84>, + <0 0 70 &gic 0 6 0x84>, + <0 0 71 &gic 0 7 0x84>, + <0 0 72 &gic 0 8 0x84>; /include/ "vexpress-v2m-rs1.dtsi" }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index c544a55..930e2ef 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -195,7 +195,7 @@ <5 0 0x10000000 0x04000000>; #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; + interrupt-map-mask = <0 0 127>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, <0 0 2 &gic 0 2 4>, @@ -238,7 +238,13 @@ <0 0 39 &gic 0 39 4>, <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; + <0 0 42 &gic 0 42 4>, + + /* FIQ shadow routings */ + <0 0 69 &gic 0 5 0x84>, + <0 0 70 &gic 0 6 0x84>, + <0 0 71 &gic 0 7 0x84>, + <0 0 72 &gic 0 8 0x84>; /include/ "vexpress-v2m-rs1.dtsi" };