From patchwork Thu May 29 22:40:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 4267881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7BA95BEEA7 for ; Thu, 29 May 2014 22:50:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A29F820303 for ; Thu, 29 May 2014 22:50:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CDA952034E for ; Thu, 29 May 2014 22:50:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wq97Y-0004o8-77; Thu, 29 May 2014 22:48:24 +0000 Received: from mail-ob0-x229.google.com ([2607:f8b0:4003:c01::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wq97L-0004Zk-Qc for linux-arm-kernel@lists.infradead.org; Thu, 29 May 2014 22:48:12 +0000 Received: by mail-ob0-f169.google.com with SMTP id vb8so1056041obc.0 for ; Thu, 29 May 2014 15:47:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Z6Bu4Pw765LIBEDUT/scjf/VFls67HAr3m3UKO14ENM=; b=rquDbJxccK+5kCj26TJyNhnZeWK/62zoUCWctogr/y0mfFSKXRj5TmFJBQaEGjz4CL +cLjmqTU4OtobOUQP+jVJtF8IwBZRJuoMekIkpFhr6HA5RdMFZsLpLaN46Vr2gIJSWx/ AUdlkiq0fTpyNwsDbqRxgQgFk560Fxr/KojSbOtRHvGunZcswuRiQXT7imPY+mxyNA18 ljntWtaVWAKZKxBn7pZ1qkGZuH7btjZe98HHsqYuI+ZK4JHyKk5NI99k6BgEI4W45LNH Z0arQn0m0nqRc430xKAbstS7NEFS5No/i8luILinYA49Dqbhx7vu7z2Zp4o2gMoDSnXf DY2w== X-Received: by 10.182.1.199 with SMTP id 7mr12567906obo.44.1401403248792; Thu, 29 May 2014 15:40:48 -0700 (PDT) Received: from localhost.localdomain (66-90-144-10.dyn.grandenetworks.net. [66.90.144.10]) by mx.google.com with ESMTPSA id tz6sm3528543obc.10.2014.05.29.15.40.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 29 May 2014 15:40:48 -0700 (PDT) From: Rob Herring To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v2 03/11] irqchip: versatile-fpga: add support for arm, versatile-sic Date: Thu, 29 May 2014 17:40:13 -0500 Message-Id: <1401403221-27523-4-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1401403221-27523-1-git-send-email-robherring2@gmail.com> References: <1401403221-27523-1-git-send-email-robherring2@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140529_154811_973280_C5A1097E X-CRM114-Status: GOOD ( 12.46 ) X-Spam-Score: 0.1 (/) Cc: Rob Herring , Jason Cooper , Arnd Bergmann , Linus Walleij , arm@kernel.org, Thomas Gleixner X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rob Herring The secondary controller on ARM Versatile AB and PB is similar to other ARM platforms, but has a pass-thru register to connect some interrupts directly to interrupt inputs on the primary interrupt controller. The PIC_ENABLES register needs to be configured for proper operation when the matching node is arm,versatile-sic. Add the the necessary IRQCHIP_DECLARE as well. Signed-off-by: Rob Herring Cc: Thomas Gleixner Cc: Jason Cooper Cc: Arnd Bergmann Acked-by: Linus Walleij --- v2: - Rework to use the compatible string for pass-thru register setup. drivers/irqchip/irq-versatile-fpga.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/irqchip/irq-versatile-fpga.c b/drivers/irqchip/irq-versatile-fpga.c index 8e0bb56..90bf131 100644 --- a/drivers/irqchip/irq-versatile-fpga.c +++ b/drivers/irqchip/irq-versatile-fpga.c @@ -28,6 +28,8 @@ #define FIQ_ENABLE_SET 0x28 #define FIQ_ENABLE_CLEAR 0x2C +#define PIC_ENABLES 0x20 /* set interrupt pass through bits */ + /** * struct fpga_irq_data - irq data container for the FPGA IRQ controller * @base: memory offset in virtual memory @@ -213,7 +215,15 @@ int __init fpga_irq_of_init(struct device_node *node, writel(clear_mask, base + IRQ_ENABLE_CLEAR); writel(clear_mask, base + FIQ_ENABLE_CLEAR); + /* + * On Versatile AB/PB, some secondary interrupts have a direct + * pass-thru to the primary controller which need to be enabled. + */ + if (of_device_is_compatible(node, "arm,versatile-sic")) + writel(0xffd00000, base + PIC_ENABLES); + return 0; } IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init); +IRQCHIP_DECLARE(arm_fpga_sic, "arm,versatile-sic", fpga_irq_of_init); #endif