From patchwork Tue Jun 3 18:48:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chirantan Ekbote X-Patchwork-Id: 4290101 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 51E95BEEA7 for ; Tue, 3 Jun 2014 18:51:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 83E3A201BC for ; Tue, 3 Jun 2014 18:51:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ABC65201BA for ; Tue, 3 Jun 2014 18:51:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wrtlc-0007dq-HO; Tue, 03 Jun 2014 18:49:00 +0000 Received: from mail-pb0-x22e.google.com ([2607:f8b0:400e:c01::22e]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WrtlZ-0007dM-QR for linux-arm-kernel@lists.infradead.org; Tue, 03 Jun 2014 18:48:58 +0000 Received: by mail-pb0-f46.google.com with SMTP id rq2so5840844pbb.19 for ; Tue, 03 Jun 2014 11:48:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=LwXyYiGjdzP0IlRnafULVAdKSsH9AeSnznqy4qSoemc=; b=coYfHuqR0WZpkBQj+vAIe+YcacZWgUHMZqY1/enRkZtF6j0pBFlJ2B9NPBgec/gf9K twOB8wDSyd4Bean6touZaRWvkX6ArIMaKY7xQ0F0RLJB9jWShOU+SfTe2dCDD40NkjbB e35C6zlonpWV3dTDyzPq6dBfRTk/jOKGYYSE0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=LwXyYiGjdzP0IlRnafULVAdKSsH9AeSnznqy4qSoemc=; b=YWizVqW2U9RitGMmuqG/yp1QGnliiQMYFT2pIz7Z+vqP/voe7qNkz/UxLABYFe2toI gJDAMCQ1oTwIycPlQoO/Kry7MKW4Bdvf6qp8gWssN89Odth5luNzKgR3d5qjcnFm0J8g QpB4lr9M47lEk3i5U9i8r9ZagU45jm+Bi8NLA5tg6a4dIThwVDkq2D/LM/dFaxypuf3V dFd07fKo3R3gD75YQFKyhle7cwiFSsBo3x2HM/olEzgRmBAa2CxRRW52ny7wvHcu1FJZ 00yjZwd5yc8MMczPvWO62RgAHzPIhkSluy0hCsDmt450/dO4IT03gECCq/lYaNwZDyD2 R8uw== X-Gm-Message-State: ALoCoQmh3A0+qAMVgBRCxdEOmkpJdzmM7GbQmgdrS4dfyOGXq7H23TznFaK+4MN2+aBRMYE5GPCc X-Received: by 10.68.173.65 with SMTP id bi1mr53907265pbc.130.1401821315459; Tue, 03 Jun 2014 11:48:35 -0700 (PDT) Received: from endor.mtv.corp.google.com (endor.mtv.corp.google.com [172.22.73.11]) by mx.google.com with ESMTPSA id iq10sm215844pbc.14.2014.06.03.11.48.34 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Jun 2014 11:48:34 -0700 (PDT) From: Chirantan Ekbote To: linux@arm.linux.org.uk Subject: [PATCH] arm: mct: Don't reset the counter during boot and resume Date: Tue, 3 Jun 2014 11:48:19 -0700 Message-Id: <1401821299-24431-1-git-send-email-chirantan@chromium.org> X-Mailer: git-send-email 1.9.1.423.g4596e3a X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140603_114857_892503_8DF5D372 X-CRM114-Status: GOOD ( 14.36 ) X-Spam-Score: -0.1 (/) Cc: Kukjin Kim , Chirantan Ekbote , Doug Anderson , Tomasz Figa , linux-samsung-soc@vger.kernel.org, Olof Johansson , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Unfortunately on some exynos systems, resetting the mct counter also resets the architected timer counter. This can cause problems if the architected timer driver has already been initialized because the kernel will think that the counter has wrapped around, causing a big jump in printk timestamps and delaying any scheduled clock events until the counter reaches the value it had before it was reset. The kernel code makes no assumptions about the initial value of the mct counter so there is no reason from a software perspective to clear the counter before starting it. This also fixes the problems described in the previous paragraph. Cc: Olof Johansson Cc: Doug Anderson Cc: Kukjin Kim Cc: Tomasz Figa Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Signed-off-by: Chirantan Ekbote Reviewed-by: Doug Anderson Tested-by: Doug Anderson --- drivers/clocksource/exynos_mct.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index acf5a32..9b4a0ae 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -152,13 +152,10 @@ static void exynos4_mct_write(unsigned int value, unsigned long offset) } /* Clocksource handling */ -static void exynos4_mct_frc_start(u32 hi, u32 lo) +static void exynos4_mct_frc_start(void) { u32 reg; - exynos4_mct_write(lo, EXYNOS4_MCT_G_CNT_L); - exynos4_mct_write(hi, EXYNOS4_MCT_G_CNT_U); - reg = __raw_readl(reg_base + EXYNOS4_MCT_G_TCON); reg |= MCT_G_TCON_START; exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON); @@ -180,7 +177,7 @@ static cycle_t exynos4_frc_read(struct clocksource *cs) static void exynos4_frc_resume(struct clocksource *cs) { - exynos4_mct_frc_start(0, 0); + exynos4_mct_frc_start(); } struct clocksource mct_frc = { @@ -194,7 +191,7 @@ struct clocksource mct_frc = { static void __init exynos4_clocksource_init(void) { - exynos4_mct_frc_start(0, 0); + exynos4_mct_frc_start(); if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name);