From patchwork Tue Jun 10 10:25:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Carikli X-Patchwork-Id: 4327751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 064DCBEEE9 for ; Tue, 10 Jun 2014 10:29:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 31898202E5 for ; Tue, 10 Jun 2014 10:29:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AC924202B4 for ; Tue, 10 Jun 2014 10:29:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WuJGa-00069X-Oi; Tue, 10 Jun 2014 10:26:56 +0000 Received: from smtp2-g21.free.fr ([212.27.42.2]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WuJG6-0005uR-AE for linux-arm-kernel@lists.infradead.org; Tue, 10 Jun 2014 10:26:27 +0000 Received: from denis-N73SV.local.eukrea.fr (unknown [88.170.243.169]) by smtp2-g21.free.fr (Postfix) with ESMTP id E4F3E4B00C1; Tue, 10 Jun 2014 12:25:59 +0200 (CEST) From: Denis Carikli To: Philipp Zabel Subject: [PATCH v13 04/10] imx-drm: use defines for clock polarity settings Date: Tue, 10 Jun 2014 12:25:45 +0200 Message-Id: <1402395951-7988-4-git-send-email-denis@eukrea.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402395951-7988-1-git-send-email-denis@eukrea.com> References: <1402395951-7988-1-git-send-email-denis@eukrea.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140610_032626_537999_F0DA207C X-CRM114-Status: GOOD ( 12.96 ) X-Spam-Score: 1.0 (+) Cc: devel@driverdev.osuosl.org, Russell King , =?UTF-8?q?Eric=20B=C3=A9nard?= , David Airlie , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, Denis Carikli , Laurent Pinchart , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, Mauro Carvalho Chehab X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Denis Carikli --- ChangeLog 12->v13: - No changes ChangeLog 11->v12: - Improved the define names to match the hardware: ENABLE_POL is not a clock signal but instead an enable signal. ChangeLog v9->v10: - New patch which was splitted out from: "staging: imx-drm: Use de-active and pixelclk-active display-timings.". - Fixes many issues in "staging: imx-drm: Use de-active and pixelclk-active display-timings.": - More clear meaning of the polarity settings. - The SET_CLK_POL and SET_DE_POL masks are not needed anymore. --- drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h | 8 +++++++- drivers/staging/imx-drm/ipu-v3/ipu-di.c | 4 ++-- drivers/staging/imx-drm/ipuv3-crtc.c | 4 ++-- 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h index c2c6fab..015e3bf 100644 --- a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h +++ b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h @@ -27,6 +27,12 @@ enum ipuv3_type { #define IPU_PIX_FMT_GBR24 v4l2_fourcc('G', 'B', 'R', '3') +#define CLK_POL_NEGEDGE 0 +#define CLK_POL_POSEDGE 1 + +#define ENABLE_POL_LOW 0 +#define ENABLE_POL_HIGH 1 + /* * Bitfield of Display Interface signal polarities. */ @@ -37,7 +43,7 @@ struct ipu_di_signal_cfg { unsigned clksel_en:1; unsigned clkidle_en:1; unsigned data_pol:1; /* true = inverted */ - unsigned clk_pol:1; /* true = rising edge */ + unsigned clk_pol:1; unsigned enable_pol:1; unsigned Hsync_pol:1; /* true = active high */ unsigned Vsync_pol:1; diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-di.c b/drivers/staging/imx-drm/ipu-v3/ipu-di.c index 849b3e1..0ce3f52 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-di.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-di.c @@ -595,7 +595,7 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) } } - if (sig->clk_pol) + if (sig->clk_pol == CLK_POL_POSEDGE) di_gen |= DI_GEN_POLARITY_DISP_CLK; ipu_di_write(di, di_gen, DI_GENERAL); @@ -606,7 +606,7 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) reg = ipu_di_read(di, DI_POL); reg &= ~(DI_POL_DRDY_DATA_POLARITY | DI_POL_DRDY_POLARITY_15); - if (sig->enable_pol) + if (sig->enable_pol == ENABLE_POL_HIGH) reg |= DI_POL_DRDY_POLARITY_15; if (sig->data_pol) reg |= DI_POL_DRDY_DATA_POLARITY; diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c index 47bec5e..ba9eea3 100644 --- a/drivers/staging/imx-drm/ipuv3-crtc.c +++ b/drivers/staging/imx-drm/ipuv3-crtc.c @@ -165,8 +165,8 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc, if (mode->flags & DRM_MODE_FLAG_PVSYNC) sig_cfg.Vsync_pol = 1; - sig_cfg.enable_pol = 1; - sig_cfg.clk_pol = 0; + sig_cfg.enable_pol = ENABLE_POL_HIGH; + sig_cfg.clk_pol = CLK_POL_NEGEDGE; sig_cfg.width = mode->hdisplay; sig_cfg.height = mode->vdisplay; sig_cfg.pixel_fmt = out_pixel_fmt;