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Fri, 13 Jun 2014 15:08:23 +0900 (KST) From: Chanwoo Choi To: cpufreq@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/4] clk: samsung: Add support for cpu clocks of Exynos3250 Date: Fri, 13 Jun 2014 15:08:11 +0900 Message-id: <1402639693-31108-3-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1402639693-31108-1-git-send-email-cw00.choi@samsung.com> References: <1402639693-31108-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuplkeLIzCtJLcpLzFFi42JZI2JSrBs+dVawwYQOeYunTT/YLa5/ec5q 8f/Ra1aL3gVX2SzONr1ht9j0+BqrxYzz+5gsnk64yGbxdN0SZov1M16zWHQsY7TY+NXDgcfj zrU9bB6bl9R79G1Zxeix/do8Zo/Pm+QCWKO4bFJSczLLUov07RK4Mpb032Uq2CVcsa3/IGMD 42P+LkZODgkBE4mJe2+zQ9hiEhfurWfrYuTiEBJYyihxd/1CZpiiu1u3s0AkFjFK7GrexA7h NDFJtJ9cAlbFJqAlsf/FDTYQW0TAUeLpo6lgHcwC3xglGv8/ZwVJCAt4S9zqOgdWxCKgKnF+ yS1GEJtXwFXi6IebUHfISXzY8wjM5hRwk7iw/QhYjRBQzc31J1kgag6xS3RPL4aYIyDxbfIh oDgHUFxWYtMBqKslJQ6uuMEygVF4ASPDKkbR1ILkguKk9CJTveLE3OLSvHS95PzcTYzAqDj9 79nEHYz3D1gfYkwGGjeRWUo0OR8YVXkl8YbGZkYWpiamxkbmlmakCSuJ86Y/SgoSEkhPLEnN Tk0tSC2KLyrNSS0+xMjEwSnVwDilzajz3JWZJx4ZXDW7FJsT9k/p1wbLfUrLtXTmRAZV+7hN d1PYVVRkMaXwmuRm7YdbHHYbeYjoW/z+azF707yZfyf4RAlt9BQrmvl3xvO+Xi8BI+5ZfP9b KnIfJOoJKah1ax39v69hZt3CJKvTVyROupRlpfkc18jinFHIsTcsQifC7LC3ohJLcUaioRZz UXEiAFwU29mgAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNIsWRmVeSWpSXmKPExsVy+t9jAd3wqbOCDe4/F7N42vSD3eL6l+es Fv8fvWa16F1wlc3ibNMbdotNj6+xWsw4v4/J4umEi2wWT9ctYbZYP+M1i0XHMkaLjV89HHg8 7lzbw+axeUm9R9+WVYwe26/NY/b4vEkugDWqgdEmIzUxJbVIITUvOT8lMy/dVsk7ON453tTM wFDX0NLCXEkhLzE31VbJxSdA1y0zB+g6JYWyxJxSoFBAYnGxkr4dpgmhIW66FjCNEbq+IUFw PUYGaCBhDWPGkv67TAW7hCu29R9kbGB8zN/FyMkhIWAicXfrdhYIW0ziwr31bF2MXBxCAosY JXY1b2KHcJqYJNpPLmEGqWIT0JLY/+IGG4gtIuAo8fTRVBaQImaBb4wSjf+fs4IkhAW8JW51 nQMrYhFQlTi/5BYjiM0r4Cpx9MNNdoh1chIf9jwCszkF3CQubD8CViMEVHNz/UmWCYy8CxgZ VjGKphYkFxQnpeca6hUn5haX5qXrJefnbmIER90zqR2MKxssDjEKcDAq8fCu+DgzWIg1say4 MvcQowQHs5II772GWcFCvCmJlVWpRfnxRaU5qcWHGJOBrprILCWanA9MCHkl8YbGJmZGlkbm hhZGxuakCSuJ8x5otQ4UEkhPLEnNTk0tSC2C2cLEwSnVwBhrel3ws5/OorQDd3dvtTpv1H6u y/GV9Pb79f4Mi++xeQsy5LWVXmfa+JaTW/VAyCYTn4NHF+t/Pbv0VM2BWyGPv23aOudp1s/3 kZks+bZeHQp5z4TnLlXKjdx64EJUxrfn5tGfVG3ZrjnLXOnZE539XPjimce1Fw7OWN5paOcU supAs5exaIMSS3FGoqEWc1FxIgAqnK7H/gIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140612_230848_956378_E5FF2978 X-CRM114-Status: GOOD ( 12.34 ) X-Spam-Score: -5.7 (-----) Cc: kgene.kim@samsung.com, mturquette@linaro.org, heiko@sntech.de, viresh.kumar@linaro.org, t.figa@samsung.com, cw00.choi@samsung.com, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, shawn.guo@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch add support for a new clock type for Exynos3250 CPU clock provider and modify little difference of DIV_CPU0 between Exynos4 and Exynos3250. Cc: Tomas Abraham Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Kyungmin Park --- drivers/clk/samsung/clk-cpu.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c index 13fa4c5..ccdcd6a 100644 --- a/drivers/clk/samsung/clk-cpu.c +++ b/drivers/clk/samsung/clk-cpu.c @@ -36,6 +36,9 @@ #define EXYNOS4210_DIV1_HPM_MASK ((0x7 << 0) | (0x7 << 4)) #define EXYNOS4210_MUX_HPM_MASK (1 << 20) +#define EXYNOS3250_DIV_CPU0(d3, d2, d1, d0) \ + (((d3) << 24) | ((d2) << 20) | ((d1) << 16) | ((d0) << 4)) + /** * struct exynos4210_armclk_data: config data to setup exynos4210 cpu clocks. * @prate: frequency of the parent clock. @@ -384,11 +387,27 @@ static int __init exynos4210_armclk_parser(struct device_node *np, void **data) ptr = of_prop_next_u32(prop, ptr, &cfg[col]); tdata->prate = cfg[0] * 1000; - tdata->div0 = EXYNOS4210_DIV_CPU0(cfg[6], cfg[5], cfg[4], - cfg[3], cfg[2], cfg[1]); - tdata->div1 = cells == 10 ? - EXYNOS4210_DIV_CPU1(cfg[9], cfg[8], cfg[7]) : - EXYNOS4210_DIV_CPU1(0, cfg[8], cfg[7]); + + switch (cells) { + case 7: + tdata->div0 = EXYNOS3250_DIV_CPU0(cfg[4], cfg[3], + cfg[2], cfg[1]); + tdata->div1 = EXYNOS4210_DIV_CPU1(0, cfg[6], cfg[5]); + break; + case 9: + tdata->div0 = EXYNOS4210_DIV_CPU0(cfg[6], cfg[5], + cfg[4], cfg[3], cfg[2], cfg[1]); + tdata->div1 = EXYNOS4210_DIV_CPU1(0, cfg[8], cfg[7]); + break; + case 10: + tdata->div0 = EXYNOS4210_DIV_CPU0(cfg[6], cfg[5], + cfg[4], cfg[3], cfg[2], cfg[1]); + tdata->div1 = EXYNOS4210_DIV_CPU1(cfg[9], cfg[8], + cfg[7]); + break; + default: + return -EINVAL; + } } tdata->prate = 0; return 0; @@ -409,6 +428,8 @@ static const struct exynos_cpuclk_soc_data exynos5250_cpuclk_soc_data = { }; static const struct of_device_id exynos_clock_ids_armclk[] = { + { .compatible = "samsung,exynos3250-cmu", + .data = &exynos4210_cpuclk_soc_data, }, { .compatible = "samsung,exynos4210-clock", .data = &exynos4210_cpuclk_soc_data, }, { .compatible = "samsung,exynos4412-clock",