From patchwork Mon Jun 16 13:35:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 4359271 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A4299BEECB for ; Mon, 16 Jun 2014 13:43:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8D10E20123 for ; Mon, 16 Jun 2014 13:43:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 481A1202A1 for ; Mon, 16 Jun 2014 13:43:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WwX5G-0000l3-Oo; Mon, 16 Jun 2014 13:36:26 +0000 Received: from mail-we0-x22b.google.com ([2a00:1450:400c:c03::22b]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WwX54-0000e7-7x for linux-arm-kernel@lists.infradead.org; Mon, 16 Jun 2014 13:36:16 +0000 Received: by mail-we0-f171.google.com with SMTP id q58so5663142wes.2 for ; Mon, 16 Jun 2014 06:35:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=M2D7MT7wyQFKtufaM07LbgaRcGHrfIXKR+NKlbHGYcE=; b=VYTPryXmE1EnkITWLRPzaL9H2PRBhvhGtfCJWtBJj1YdNSThsWJprcFZVC8Dt65Ky+ HQFm0TDw597VK6MEVxNc9b/DRJF1xZr4368V1mZ2rSwtTcvuLqS50KbbWWg7+9qKy4w6 cadR94AlcpW4NPr1Tk1khrlD52TeQlRX5+u47Am3x3qGH5ErS7tDWiChw2cWUSoHShvC gQf30L9ljL4jgZ59Qcq1FRmeC25CX53Hx6wKbL33XceJdHsv6hrn7vCVseIvgvwDOBgO k4Bet2hXdxoC001qC+GWs9qVNyb6plQjd7HQN1HOKa5dGutyw4I7WLklRUjQO6JYTQpy wxxQ== X-Received: by 10.194.71.81 with SMTP id s17mr29184177wju.10.1402925752271; Mon, 16 Jun 2014 06:35:52 -0700 (PDT) Received: from localhost.localdomain (37-48-45-80.tmcz.cz. [37.48.45.80]) by mx.google.com with ESMTPSA id w9sm28980205eep.39.2014.06.16.06.35.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 16 Jun 2014 06:35:51 -0700 (PDT) From: Tomeu Vizoso To: Stephen Warren , Thierry Reding , "Rafael J. Wysocki" , David Airlie , Mike Turquette , myungjoo.ham@samsung.com, kyungmin.park@samsung.com, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [RFC PATCH 1/4] memory: tegra124-emc: Add EMC driver Date: Mon, 16 Jun 2014 15:35:10 +0200 Message-Id: <1402925713-25426-2-git-send-email-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1402925713-25426-1-git-send-email-tomeu.vizoso@collabora.com> References: <1402925713-25426-1-git-send-email-tomeu.vizoso@collabora.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140616_063614_599514_43718B95 X-CRM114-Status: GOOD ( 23.49 ) X-Spam-Score: -0.7 (/) Cc: Tomeu Vizoso X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds functionality for registering memory bandwidth needs and setting the EMC clock rate based on that. Also adds API for setting floor and ceiling frequency rates. Signed-off-by: Tomeu Vizoso --- .../bindings/arm/tegra/nvidia,tegra124-emc.txt | 26 ++++ drivers/memory/Kconfig | 8 + drivers/memory/Makefile | 1 + drivers/memory/tegra124-emc.c | 173 +++++++++++++++++++++ include/linux/platform_data/tegra_emc.h | 23 +++ 5 files changed, 231 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-emc.txt create mode 100644 drivers/memory/tegra124-emc.c diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-emc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-emc.txt new file mode 100644 index 0000000..88e6a55 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-emc.txt @@ -0,0 +1,26 @@ +Tegra124 External Memory Controller + +Properties: +- compatible : Should contain "nvidia,tegra124-emc". +- reg : Should contain the register range of the device +- #address-cells : Should be 1 +- #size-cells : Should be 0 +- nvidia,mc : phandle to the mc bus connected to EMC. +- clocks : phandle to EMC, EMC shared bus override, and all parent clocks. +- clock-names : name of each clock. +- nvidia,pmc : phandle to the PMC syscon node. +- max-clock-frequency : optional, specifies the maximum EMC rate in kHz. + +Child device nodes describe the memory settings for different configurations and +clock rates. + +Example: + + memory-controller@7001b000 { + compatible = "nvidia,tegra124-emc"; + reg = <0x7001b000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car TEGRA124_CLK_EMC>; + clock-names = "emc"; + }; diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index c59e9c9..48fa0dd 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -61,6 +61,14 @@ config TEGRA30_MC analysis, especially for IOMMU/SMMU(System Memory Management Unit) module. +config TEGRA124_EMC + tristate "Tegra124 External Memory Controller (EMC) driver" + default y + depends on ARCH_TEGRA_124_SOC + help + This driver is for the External Memory Controller (EMC) module + available in Tegra124 SoCs. + config FSL_IFC bool depends on FSL_SOC diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index 71160a2..0b7290b 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_FSL_IFC) += fsl_ifc.o obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o obj-$(CONFIG_TEGRA30_MC) += tegra30-mc.o +obj-$(CONFIG_TEGRA124_EMC) += tegra124-emc.o diff --git a/drivers/memory/tegra124-emc.c b/drivers/memory/tegra124-emc.c new file mode 100644 index 0000000..b7a54a5 --- /dev/null +++ b/drivers/memory/tegra124-emc.c @@ -0,0 +1,173 @@ +/* + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include + +#define DRV_NAME "tegra124-emc" +#define EMC_FREQ_CUTOFF_USE_130_PERCENT 100000000 +#define EMC_FREQ_CUTOFF_USE_140_PERCENT 50000000 +#define BYTES_PER_EMC_CLOCK 16 + +struct tegra124_emc { + struct clk *clk; + unsigned long bandwidth_requests[TEGRA_EMC_CONSUMER_LAST]; + unsigned long floor_freq; + unsigned long ceiling_freq; + /* + * Cannot use a mutex here because the ACTMON driver would set a floor + * frequency from an IRQ handler. + */ + spinlock_t spinlock; +}; + +static struct platform_device *emc_pdev; + +static unsigned long tegra124_emc_bw_to_freq_req(unsigned long bw) +{ + return (bw + BYTES_PER_EMC_CLOCK - 1) / BYTES_PER_EMC_CLOCK; +} + +static void tegra124_emc_update_rate(struct tegra124_emc *emc) +{ + int i; + struct clk *emc_master; + unsigned long total_bandwidth = 0; + unsigned long freq; + unsigned long flags; + + spin_lock_irqsave(&emc->spinlock, flags); + + for (i = 0; i < TEGRA_EMC_CONSUMER_LAST; i++) + total_bandwidth += emc->bandwidth_requests[i]; + + emc_master = clk_get_parent(emc->clk); + freq = tegra124_emc_bw_to_freq_req(total_bandwidth) * 1000; + freq = clk_round_rate(emc_master, freq); + + /* XXX: Add safety margins for DVFS */ + + if (freq < EMC_FREQ_CUTOFF_USE_140_PERCENT) + total_bandwidth += 4 * total_bandwidth / 10; + else if (freq < EMC_FREQ_CUTOFF_USE_130_PERCENT) + total_bandwidth += 3 * total_bandwidth / 10; + else + total_bandwidth += total_bandwidth / 10; + + freq = tegra124_emc_bw_to_freq_req(total_bandwidth) * 1000; + freq = max(freq, emc->floor_freq); + freq = min(freq, emc->ceiling_freq); + + spin_unlock_irqrestore(&emc->spinlock, flags); + + + clk_set_rate(emc->clk, freq); +} + +int tegra124_emc_reserve_bandwidth(unsigned int consumer, unsigned long rate) +{ + struct tegra124_emc *emc = platform_get_drvdata(emc_pdev); + unsigned long flags; + + if (consumer >= TEGRA_EMC_CONSUMER_LAST) { + dev_err(&emc_pdev->dev, "Invalid EMC consumer ID (%u)\n", consumer); + return -EINVAL; + } + + spin_lock_irqsave(&emc->spinlock, flags); + emc->bandwidth_requests[consumer] = rate; + spin_unlock_irqrestore(&emc->spinlock, flags); + + tegra124_emc_update_rate(emc); + + return 0; +} + +void tegra124_emc_set_floor(unsigned long freq) +{ + struct tegra124_emc *emc = platform_get_drvdata(emc_pdev); + unsigned long flags; + + spin_lock_irqsave(&emc->spinlock, flags); + emc->floor_freq = freq; + spin_unlock_irqrestore(&emc->spinlock, flags); + + tegra124_emc_update_rate(emc); +} + +void tegra124_emc_set_ceiling(unsigned long freq) +{ + struct tegra124_emc *emc = platform_get_drvdata(emc_pdev); + unsigned long flags; + + spin_lock_irqsave(&emc->spinlock, flags); + emc->ceiling_freq = freq; + spin_unlock_irqrestore(&emc->spinlock, flags); + + tegra124_emc_update_rate(emc); +} + +static int tegra124_emc_probe(struct platform_device *pdev) +{ + struct tegra124_emc *emc; + + emc_pdev = pdev; + + emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL); + if (emc == NULL) { + dev_err(&pdev->dev, "Failed to allocate private memory\n"); + return -ENOMEM; + } + + emc->ceiling_freq = ULONG_MAX; + + emc->clk = devm_clk_get(&pdev->dev, "emc"); + if (IS_ERR(emc->clk)) { + devm_kfree(&pdev->dev, emc); + dev_err(&pdev->dev, "Can not find EMC clock\n"); + return -EINVAL; + } + + spin_lock_init(&emc->spinlock); + + platform_set_drvdata(emc_pdev, emc); + + return 0; +} + +static struct of_device_id tegra124_emc_of_match[] = { + { .compatible = "nvidia,tegra124-emc", }, + { }, +}; + +static struct platform_driver tegra124_emc_driver = { + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + .of_match_table = tegra124_emc_of_match, + }, + .probe = tegra124_emc_probe, +}; + +module_platform_driver(tegra124_emc_driver); + +MODULE_AUTHOR("Tomeu Vizoso "); +MODULE_DESCRIPTION("Tegra124 EMC driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/include/linux/platform_data/tegra_emc.h b/include/linux/platform_data/tegra_emc.h index df67505..2967964 100644 --- a/include/linux/platform_data/tegra_emc.h +++ b/include/linux/platform_data/tegra_emc.h @@ -31,4 +31,27 @@ struct tegra_emc_pdata { struct tegra_emc_table *tables; }; +enum { + TEGRA_EMC_CONSUMER_DISP1 = 0, + TEGRA_EMC_CONSUMER_DISP2, + TEGRA_EMC_CONSUMER_MSENC, + TEGRA_EMC_CONSUMER_CAMERA, + TEGRA_EMC_CONSUMER_AVP, + TEGRA_EMC_CONSUMER_ISO, + TEGRA_EMC_CONSUMER_LAST +}; + +#ifdef CONFIG_TEGRA124_EMC +int tegra124_emc_reserve_bandwidth(unsigned int consumer, unsigned long rate); +void tegra124_emc_set_floor(unsigned long freq); +void tegra124_emc_set_ceiling(unsigned long freq); +#else +int tegra124_emc_reserve_bandwidth(unsigned int consumer, unsigned long rate) +{ return -ENODEV; } +void tegra124_emc_set_floor(unsigned long freq) +{ return; } +void tegra124_emc_set_ceiling(unsigned long freq) +{ return; } +#endif + #endif