From patchwork Wed Jun 18 06:16:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 4373401 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6C5AABEECB for ; Wed, 18 Jun 2014 06:20:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7FBB2202AE for ; Wed, 18 Jun 2014 06:20:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 917C9201BC for ; Wed, 18 Jun 2014 06:20:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wx9Bf-0005QZ-9x; Wed, 18 Jun 2014 06:17:35 +0000 Received: from mail-ie0-f202.google.com ([209.85.223.202]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wx9B1-0005Db-FQ for linux-arm-kernel@lists.infradead.org; Wed, 18 Jun 2014 06:16:59 +0000 Received: by mail-ie0-f202.google.com with SMTP id tr6so108317ieb.1 for ; Tue, 17 Jun 2014 23:16:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=elwei4tVk0UufikT2xLtgLisdhbtdCz3qTenB6YBI4E=; b=YY6mSfJ+vsbX+Vy0yZeniQYSNbRfbebE18w234Vpa0jjXHY5/b/kjy5rkI49Ldf95c pi5wOOr2An0bT0NNnnz1H86giSNAtnJ+zKYIBJgm9ivpTi53VMSbaOJIqcoV8AKPYh1f F+fu357GD/tA5ZeQ/9GsW1MEnoZfcf5o47XUlMNJ48VY6OSl0SUvMDwM1VnwbBnjvSxS XM6JpuEwXzR/og7/jbDuVemKWLqF53BOvtUcBcb9TxIU0fS9yPsDTYHK+vYPf8F2Lxrf bCuYGDP70Vr7WMxmey6JaNULqgECV/zWL7FG/AXrj/XbGd6zj2CC92bzGrAUSDsZWkR0 OpfQ== X-Gm-Message-State: ALoCoQmxfuBBAXLaD2Hj7BeazMPvHa55nIlr/c3q3aMJPCuCACTA2bibhMI1Di7PHgN1W/Dzf7i8 X-Received: by 10.42.83.144 with SMTP id h16mr12688056icl.22.1403072197718; Tue, 17 Jun 2014 23:16:37 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id t4si74597yhm.0.2014.06.17.23.16.37 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 17 Jun 2014 23:16:37 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.72.111]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 5276A5A449E; Tue, 17 Jun 2014 23:16:37 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 13C58220378; Tue, 17 Jun 2014 23:16:37 -0700 (PDT) From: Andrew Bresticker To: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org Subject: [PATCH v1 5/9] of: Add NVIDIA Tegra XHCI controller binding Date: Tue, 17 Jun 2014 23:16:16 -0700 Message-Id: <1403072180-4944-6-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 2.0.0.526.g5318336 In-Reply-To: <1403072180-4944-1-git-send-email-abrestic@chromium.org> References: <1403072180-4944-1-git-send-email-abrestic@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140617_231655_583547_5CDB8433 X-CRM114-Status: GOOD ( 12.32 ) X-Spam-Score: -1.8 (-) Cc: Mark Rutland , Russell King , Mathias Nyman , Pawel Moll , Ian Campbell , Andrew Bresticker , Greg Kroah-Hartman , Linus Walleij , Randy Dunlap , Kishon Vijay Abraham I , Grant Likely , Rob Herring , Thierry Reding , Kumar Gala , Stephen Warren , Alan Stern , Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add device-tree binding documentation for the XHCI controller present on Tegra124 and later SoCs. Signed-off-by: Andrew Bresticker --- .../bindings/usb/nvidia,tegra124-xhci.txt | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra124-xhci.txt diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra124-xhci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra124-xhci.txt new file mode 100644 index 0000000..fdb8624 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra124-xhci.txt @@ -0,0 +1,76 @@ +NVIDIA Tegra XHCI controller +============================ + +The Tegra XHCI controller supports both USB2 and USB3 interfaces exposed +by the Tegra XUSB pad controller. + +Required properties: +-------------------- + - compatible: Should be "nvidia,tegra124-xhci". + - reg: Address and length of the register sets. There should be three + entries in the following order: XHCI host registers, FPCI registers, and + IPFS registers. + - interrupts: XHCI host interrupt. + - clocks: Must contain an entry for each entry in clock-names. + See ../clock/clock-bindings.txt for details. + - clock-names: Must include the following entries: + - xusb_host + - xusb_falcon_src + - xusb_ss + - xusb_ss_src + - xusb_hs_src + - xusb_fs_src + - pll_u_480m + - clk_m + - pll_e + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - xusb_host + - xusb_ss + - nvidia,xusb-mbox: Handle to the Tegra XUSB mailbox node. + +Optional properties: +-------------------- + - phys: Must contain an entry for each entry in phy-names. + See ../phy/phy-bindings.txt for details. + - phy-names: Should include an entry for each PHY used by the controller. + May be a subset of the following: + - utmi-{0,1,2} + - hsic-{0,1} + - usb3-{0,1} + - s1p05v-supply: 1.05V supply regulator. + - s1p8v-supply: 1.8V supply regulator. + - s3p3v-supply: 3.3V supply regulator. + +Example: +-------- + usb@0,70090000 { + compatible = "nvidia,tegra124-xhci"; + reg = <0x0 0x70090000 0x0 0x8000>, + <0x0 0x70098000 0x0 0x1000>, + <0x0 0x70099000 0x0 0x1000>; + interrupts = ; + clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>, + <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>, + <&tegra_car TEGRA124_CLK_XUSB_SS>, + <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>, + <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>, + <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>, + <&tegra_car TEGRA124_CLK_PLL_U_480M>, + <&tegra_car TEGRA124_CLK_CLK_M>, + <&tegra_car TEGRA124_CLK_PLL_E>; + clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss", + "xusb_ss_src", "xusb_hs_src", "xusb_fs_src", + "pll_u_480m", "clk_m", "pll_e"; + resets = <&tegra_car 89>, <&tegra_car 156>; + reset-names = "xusb_host", "xusb_ss"; + nvidia,xusb-mbox = <&mbox>; + phys = <&padctl TEGRA_XUSB_PADCTL_UTMI_P1>, /* mini-PCIe USB */ + <&padctl TEGRA_XUSB_PADCTL_UTMI_P2>, /* USB A */ + <&padctl TEGRA_XUSB_PADCTL_USB3_P0>; /* USB A */ + phy-names = "utmi-1", "utmi-2", "usb3-0"; + s1p05v-supply = <&vdd_1v05_run>; + s3p3v-supply = <&vdd_3v3_lp0>; + s1p8v-supply = <&vddio_1v8>; + };