From patchwork Wed Jun 18 23:03:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geoff Levand X-Patchwork-Id: 4379701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B4BF79F314 for ; Wed, 18 Jun 2014 23:07:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AB16E20377 for ; Wed, 18 Jun 2014 23:07:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CC08D20357 for ; Wed, 18 Jun 2014 23:07:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WxOtY-0002Z0-Uq; Wed, 18 Jun 2014 23:03:56 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WxOtX-0002Yj-1w for linux-arm-kernel@bombadil.infradead.org; Wed, 18 Jun 2014 23:03:55 +0000 Received: from 107-1-141-74-ip-static.hfc.comcastbusiness.net ([107.1.141.74] helo=[192.168.254.170]) by casper.infradead.org with esmtpsa (Exim 4.80.1 #2 (Red Hat Linux)) id 1WxOtS-0005Zn-IP; Wed, 18 Jun 2014 23:03:50 +0000 Message-ID: <1403132622.17030.35.camel@smoke> Subject: [PATCH] arm64: Add byte order to image header From: Geoff Levand To: Mark Rutland Date: Wed, 18 Jun 2014 16:03:42 -0700 In-Reply-To: <20140618164927.GA9612@leverpostej> References: <1400233839-15140-1-git-send-email-mark.rutland@arm.com> <1400233839-15140-4-git-send-email-mark.rutland@arm.com> <1402950432.3708.22.camel@smoke> <20140618164927.GA9612@leverpostej> X-Mailer: Evolution 3.10.4-0ubuntu1 Mime-Version: 1.0 Cc: "peter.maydell@linaro.org" , "trini@kernel.crashing.org" , Marc Zyngier , Catalin Marinas , Will Deacon , "rob.herring@linaro.org" , "leif.lindholm@linaro.org" , "ijc@hellion.org.uk" , Dave P Martin , "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When working with a raw arm64 image one needs to know the byte order of the image header to properly interpret the multi-byte values of the header. Add a character value to the image header indicating the byte order the image was built with: 1=LSB (little endian), 2=MSB (big endian), 0=no support. A zero value will indicate a kernel that pre-dates this change. Signed-off-by: Geoff Levand --- Hi, I noticed there was a change to the image header for COFF compatibility that conflicted with my old patch. Here's an update that also changes booting.txt. I'll also post a patch that adds a new file asm/image.h to describe the header. -Geoff Documentation/arm64/booting.txt | 10 ++++++---- arch/arm64/kernel/head.S | 7 ++++++- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt index beb754e..525e37c 100644 --- a/Documentation/arm64/booting.txt +++ b/Documentation/arm64/booting.txt @@ -73,13 +73,15 @@ The decompressed kernel image contains a 64-byte header as follows: u32 code0; /* Executable code */ u32 code1; /* Executable code */ u64 text_offset; /* Image load offset */ - u64 res0 = 0; /* reserved */ - u64 res1 = 0; /* reserved */ - u64 res2 = 0; /* reserved */ + u8 byte_order; /* 1=LSB (little endian), 2=MSB (big endian) */ + u8[3] res1; /* reserved */ + u32 res2 = 0; /* reserved */ u64 res3 = 0; /* reserved */ u64 res4 = 0; /* reserved */ + u64 res5 = 0; /* reserved */ + u64 res6 = 0; /* reserved */ u32 magic = 0x644d5241; /* Magic number, little endian, "ARM\x64" */ - u32 res5 = 0; /* reserved */ + u32 res7 = 0; /* reserved */ Header notes: diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index b96a732..08cd054 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -111,7 +111,12 @@ b stext // branch to kernel start, magic .long 0 // reserved .quad TEXT_OFFSET // Image load offset from start of RAM - .quad 0 // reserved + CPU_LE(.byte 1) // 1=LSB (little endian) + CPU_BE(.byte 2) // 2=MSB (big endian) + .byte 0 // reserved + .byte 0 // reserved + .byte 0 // reserved + .word 0 // reserved .quad 0 // reserved .quad 0 // reserved .quad 0 // reserved