| Message ID | 1403177830-28595-3-git-send-email-thierry.reding@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Jun 19, 2014 at 01:37:09PM +0200, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > The device tree node in the SoC file contains only the resources (such > as registers, resets, ...) but none of the lane assignment information > since that's board specific and belongs in the board file. > > Tested-by: Mikko Perttunen <mperttunen@nvidia.com> > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > Changes in v2: > - include dt-bindings/pinctrl/pinctrl-tegra-xusb.h so that board files > don't have to include it explicitly > - remove unneeded #address-cells/#size-cells = <0> > - add padctl label for XUSB pad controller node > > arch/arm/boot/dts/tegra124.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) Patches 3 and 4 applied to the for-3.17/dt branch and rebased the branch on for-3.17/xusb-padctl because of the dependency on the dt-bindings header. Thierry
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 6e6bc4e8185c..b7cb944b2faa 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -1,6 +1,7 @@ #include <dt-bindings/clock/tegra124-car.h> #include <dt-bindings/gpio/tegra-gpio.h> #include <dt-bindings/pinctrl/pinctrl-tegra.h> +#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton.dtsi" @@ -449,6 +450,15 @@ clock-names = "pclk", "clk32k_in"; }; + padctl: padctl@0,7009f000 { + compatible = "nvidia,tegra124-xusb-padctl"; + reg = <0x0 0x7009f000 0x0 0x1000>; + resets = <&tegra_car 142>; + reset-names = "padctl"; + + #phy-cells = <1>; + }; + sdhci@0,700b0000 { compatible = "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0000 0x0 0x200>;