From patchwork Wed Jun 25 13:37:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 4420901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 72E829F1D6 for ; Wed, 25 Jun 2014 13:41:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 887C12038F for ; Wed, 25 Jun 2014 13:41:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A321C2037B for ; Wed, 25 Jun 2014 13:41:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WznQG-0008EX-Dt; Wed, 25 Jun 2014 13:39:36 +0000 Received: from mailout4.w1.samsung.com ([210.118.77.14]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WznPP-0007aB-Hi for linux-arm-kernel@lists.infradead.org; Wed, 25 Jun 2014 13:38:44 +0000 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N7Q00AIL8JNP210@mailout4.w1.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 25 Jun 2014 14:38:11 +0100 (BST) X-AuditID: cbfec7f4-b7fac6d000006cfe-5c-53aad0ca9642 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 52.9B.27902.AC0DAA35; Wed, 25 Jun 2014 14:38:18 +0100 (BST) Received: from AMDC1227.digital.local ([106.116.147.199]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N7Q00AH88JOVV90@eusync2.samsung.com>; Wed, 25 Jun 2014 14:38:18 +0100 (BST) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 5/6] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Date: Wed, 25 Jun 2014 15:37:30 +0200 Message-id: <1403703451-12233-6-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.9.3 In-reply-to: <1403703451-12233-1-git-send-email-t.figa@samsung.com> References: <1403703451-12233-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrLLMWRmVeSWpSXmKPExsVy+t/xK7qnLqwKNvj+Td7i0fzHzBa9C66y WWzvnMFuMeXPciaLTY+vsVpc3jWHzWL2kn4Wixnn9zFZ3L7Ma7H2yF12i9d9a5gt1s94zWKx atcfRov9V7wc+DxamnvYPL59ncTicbmvl8lj0fcsj52z7rJ73Lm2h81j85J6j74tqxg9jt/Y zuTxeZNcAFcUl01Kak5mWWqRvl0CV8arM7UFs8Ur7p2aw9jA2CDcxcjJISFgItHXfp4VwhaT uHBvPVsXIxeHkMBSRon32+8ygySEBPqYJKYvTwOx2QTUJD43PGIDsUUEVCU+ty1gB2lgFmhg kbjSeh0sISwQJtHWeY8dxGYBKjr4fyZYnFfASeLf2kvMENvkJHq3vQGzOQWcJS7M+8MKscxJ Yt6TI4wTGHkXMDKsYhRNLU0uKE5KzzXUK07MLS7NS9dLzs/dxAgJ4i87GBcfszrEKMDBqMTD G8CzKliINbGsuDL3EKMEB7OSCK/7fqAQb0piZVVqUX58UWlOavEhRiYOTqkGRu3wJQKl7Zv6 J8dwdbdct2iedI9PNdeCyU4lJZX3VEmXatXa4j33WFjC3hm8PqD4tdWe3yLDZYmJk4OPs0hr +tHZxrPPHrn7Z6FSYdzUyB6n3qVXBA/ErCq0uf8ognvexY1P9ZWObdyyQcrYzdW4vvHm4pRV h18YJixUXh9RONkttlnKWCJFiaU4I9FQi7moOBEAeBOJzEACAAA= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140625_063843_838994_8442B58C X-CRM114-Status: GOOD ( 12.67 ) X-Spam-Score: -5.0 (-----) Cc: Kukjin Kim , Laura Abbott , Tony Lindgren , Linus Walleij , linux-kernel@vger.kernel.org, Tomasz Figa , Tomasz Figa , Santosh Shilimkar , Russell King - ARM Linux , linux-omap@vger.kernel.org, Daniel Drake , linux-arm-kernel@lists.infradead.org, Marek Szyprowski X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos4 SoCs equipped with an L2C-310 cache controller and running under secure firmware require certain registers of aforementioned IP to be accessed only from secure mode. This means that SMC calls are required for certain register writes. To handle this, an implementation of .write_sec callback is provided by this patch. Signed-off-by: Tomasz Figa --- arch/arm/mach-exynos/firmware.c | 63 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index eb91d23..def7bb4 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -14,7 +14,9 @@ #include #include +#include #include +#include #include @@ -70,6 +72,57 @@ static const struct firmware_ops exynos_firmware_ops = { .cpu_boot = exynos_cpu_boot, }; +static void exynos_l2_write_sec(unsigned long val, void __iomem *base, + unsigned reg) +{ + switch (reg) { + case L2X0_CTRL: + if (val & L2X0_CTRL_EN) + exynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0); + exynos_smc(SMC_CMD_L2X0CTRL, val, 0, 0); + break; + + case L2X0_AUX_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP2, + readl_relaxed(base + L310_POWER_CTRL), + val, 0); + break; + + case L2X0_DEBUG_CTRL: + exynos_smc(SMC_CMD_L2X0DEBUG, val, 0, 0); + break; + + case L310_TAG_LATENCY_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP1, + val, + readl_relaxed(base + L310_DATA_LATENCY_CTRL), + readl_relaxed(base + L310_PREFETCH_CTRL)); + break; + + case L310_DATA_LATENCY_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP1, + readl_relaxed(base + L310_TAG_LATENCY_CTRL), + val, + readl_relaxed(base + L310_PREFETCH_CTRL)); + break; + + case L310_PREFETCH_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP1, + readl_relaxed(base + L310_TAG_LATENCY_CTRL), + readl_relaxed(base + L310_DATA_LATENCY_CTRL), + val); + break; + + case L310_POWER_CTRL: + exynos_smc(SMC_CMD_L2X0SETUP2, val, + readl_relaxed(base + L2X0_AUX_CTRL), 0); + break; + + default: + WARN_ONCE(1, "%s: ignoring write to reg 0x%x\n", __func__, reg); + } +} + void __init exynos_firmware_init(void) { struct device_node *nd; @@ -89,4 +142,14 @@ void __init exynos_firmware_init(void) pr_info("Running under secure firmware.\n"); register_firmware_ops(&exynos_firmware_ops); + + /* + * Exynos 4 SoCs (based on Cortex A9 and equipped with L2C-310), + * running under secure firmware, require certain registers of L2 + * cache controller to be written in secure mode. Here .write_sec + * callback is provided to perform necessary SMC calls. + */ + if (IS_ENABLED(CONFIG_CACHE_L2X0) + && read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) + outer_cache.write_sec = exynos_l2_write_sec; }