| Message ID | 1403870848-1754-1-git-send-email-thierry.reding@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 06/27/2014 06:07 AM, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > Add device tree bindings for the flow controller found on NVIDIA Tegra > SoCs. > > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt > +NVIDIA Tegra20 Flow Controller > + > +Required properties: > +- compatible: "nvidia,tegra20-flowctrl" > +- reg: Should contain one register range (address and length) > + > +Example: > + > + flow-controller@60007000 { > + compatible = "nvidia,tegra20-flowctrl"; > + reg = <0x60007000 0x1000>; > + }; The bindings all have the same structure. Can we collapse them all into this one file and just list all the valid compatible values and say pick one?
On 06/27/2014 03:20 PM, Stephen Warren wrote: > On 06/27/2014 06:07 AM, Thierry Reding wrote: >> From: Thierry Reding <treding@nvidia.com> >> >> Add device tree bindings for the flow controller found on NVIDIA Tegra >> SoCs. >> > >> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt > >> +NVIDIA Tegra20 Flow Controller >> + >> +Required properties: >> +- compatible: "nvidia,tegra20-flowctrl" >> +- reg: Should contain one register range (address and length) >> + >> +Example: >> + >> + flow-controller@60007000 { >> + compatible = "nvidia,tegra20-flowctrl"; >> + reg = <0x60007000 0x1000>; >> + }; > > The bindings all have the same structure. Can we collapse them all into > this one file and just list all the valid compatible values and say pick > one? Thierry, did you post an updated version of this patch? If so, I seem to have lost it, so a repost would be good. Thanks.
On Mon, Aug 25, 2014 at 11:32:20AM -0600, Stephen Warren wrote: > On 06/27/2014 03:20 PM, Stephen Warren wrote: > >On 06/27/2014 06:07 AM, Thierry Reding wrote: > >>From: Thierry Reding <treding@nvidia.com> > >> > >>Add device tree bindings for the flow controller found on NVIDIA Tegra > >>SoCs. > >> > > > >>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt > > > >>+NVIDIA Tegra20 Flow Controller > >>+ > >>+Required properties: > >>+- compatible: "nvidia,tegra20-flowctrl" > >>+- reg: Should contain one register range (address and length) > >>+ > >>+Example: > >>+ > >>+ flow-controller@60007000 { > >>+ compatible = "nvidia,tegra20-flowctrl"; > >>+ reg = <0x60007000 0x1000>; > >>+ }; > > > >The bindings all have the same structure. Can we collapse them all into > >this one file and just list all the valid compatible values and say pick > >one? > > Thierry, did you post an updated version of this patch? If so, I seem to > have lost it, so a repost would be good. Thanks. I don't think I did. If my memory serves me well then I did address your comments but never sent out the patches. I'll check what the status is. Thierry
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra114-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra114-flowctrl.txt new file mode 100644 index 000000000000..72599fdb09a2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra114-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra114 Flow Controller + +Required properties: +- compatible: "nvidia,tegra114-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@60007000 { + compatible = "nvidia,tegra114-flowctrl"; + reg = <0x60007000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-flowctrl.txt new file mode 100644 index 000000000000..3af5fe2019f2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra124 Flow Controller + +Required properties: +- compatible: "nvidia,tegra124-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@0,60007000 { + compatible = "nvidia,tegra124-flowctrl"; + reg = <0x0 0x60007000 0x0 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt new file mode 100644 index 000000000000..b077ca8a22c6 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra20 Flow Controller + +Required properties: +- compatible: "nvidia,tegra20-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@60007000 { + compatible = "nvidia,tegra20-flowctrl"; + reg = <0x60007000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-flowctrl.txt new file mode 100644 index 000000000000..72c90dd59110 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra30 Flow Controller + +Required properties: +- compatible: "nvidia,tegra30-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@60007000 { + compatible = "nvidia,tegra30-flowctrl"; + reg = <0x60007000 0x1000>; + };