From patchwork Fri Jun 27 12:07:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 4434811 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 877E79F383 for ; Fri, 27 Jun 2014 12:09:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9DCEA20320 for ; Fri, 27 Jun 2014 12:09:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B2F6F20270 for ; Fri, 27 Jun 2014 12:09:52 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X0Uwd-0005HI-86; Fri, 27 Jun 2014 12:07:55 +0000 Received: from mail-we0-x22b.google.com ([2a00:1450:400c:c03::22b]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X0Uwa-0005C8-QV for linux-arm-kernel@lists.infradead.org; Fri, 27 Jun 2014 12:07:53 +0000 Received: by mail-we0-f171.google.com with SMTP id q58so5144486wes.2 for ; Fri, 27 Jun 2014 05:07:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=3vAEmwcg+STXlSQ3/yk9zkMpHDL9BTD8a8lP02NIr9s=; b=LYBOAE3Au1GFK/mIyezbn2zDnWPSLypO9KvVCXgbzmiVFSX44oOQlnlhwf+Z6dJ967 Nypp7GbNqP8c3jaJDMTdKKu3fryfckw1ozruyzL5ABk7yxOaLXZH4eFVNGeL5lKO2gFG afg4m6Zr0ubaD2jLZ5UXK6ZC1J8ZL/8onxvM8v1NiNVLVtJh2vZnZmd7qJLBVgsAwvPt Qrp3/yRFqIfnX/K9G/JOpL1th6pk8S+41pC0CIANk6wMx4b7C0Qum2pre5E5NZHpCrEL zAImTY8b/5chuNOKmT+fkuVif0eskeu0mRL2F00U+egxO6RiTE01aR92uguIxGKVprrc DiAA== X-Received: by 10.194.186.178 with SMTP id fl18mr24541118wjc.83.1403870850502; Fri, 27 Jun 2014 05:07:30 -0700 (PDT) Received: from localhost (port-35906.pppoe.wtnet.de. [46.59.191.32]) by mx.google.com with ESMTPSA id w5sm77268924wif.3.2014.06.27.05.07.29 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Jun 2014 05:07:29 -0700 (PDT) From: Thierry Reding To: Stephen Warren Subject: [PATCH v2 1/3] of: Add NVIDIA Tegra flow controller bindings Date: Fri, 27 Jun 2014 14:07:26 +0200 Message-Id: <1403870848-1754-1-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.0.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140627_050753_023083_213ED6D4 X-CRM114-Status: UNSURE ( 9.41 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.8 (/) Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding Add device tree bindings for the flow controller found on NVIDIA Tegra SoCs. Signed-off-by: Thierry Reding --- .../bindings/arm/tegra/nvidia,tegra114-flowctrl.txt | 12 ++++++++++++ .../bindings/arm/tegra/nvidia,tegra124-flowctrl.txt | 12 ++++++++++++ .../bindings/arm/tegra/nvidia,tegra20-flowctrl.txt | 12 ++++++++++++ .../bindings/arm/tegra/nvidia,tegra30-flowctrl.txt | 12 ++++++++++++ 4 files changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra114-flowctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-flowctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-flowctrl.txt diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra114-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra114-flowctrl.txt new file mode 100644 index 000000000000..72599fdb09a2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra114-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra114 Flow Controller + +Required properties: +- compatible: "nvidia,tegra114-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@60007000 { + compatible = "nvidia,tegra114-flowctrl"; + reg = <0x60007000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-flowctrl.txt new file mode 100644 index 000000000000..3af5fe2019f2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra124 Flow Controller + +Required properties: +- compatible: "nvidia,tegra124-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@0,60007000 { + compatible = "nvidia,tegra124-flowctrl"; + reg = <0x0 0x60007000 0x0 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt new file mode 100644 index 000000000000..b077ca8a22c6 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra20 Flow Controller + +Required properties: +- compatible: "nvidia,tegra20-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@60007000 { + compatible = "nvidia,tegra20-flowctrl"; + reg = <0x60007000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-flowctrl.txt new file mode 100644 index 000000000000..72c90dd59110 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra30 Flow Controller + +Required properties: +- compatible: "nvidia,tegra30-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@60007000 { + compatible = "nvidia,tegra30-flowctrl"; + reg = <0x60007000 0x1000>; + };