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Wed, 2 Jul 2014 09:48:01 +0000 Received: from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s629lmLF017458; Wed, 2 Jul 2014 02:47:57 -0700 From: Jingchang Lu To: Subject: [PATCH 2/5] ARM: dts: Add initial LS1021A QDS board dts support Date: Wed, 2 Jul 2014 17:02:49 +0800 Message-ID: <1404291772-2644-3-git-send-email-jingchang.lu@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1404291772-2644-1-git-send-email-jingchang.lu@freescale.com> References: <1404291772-2644-1-git-send-email-jingchang.lu@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(199002)(189002)(107046002)(95666004)(104016002)(88136002)(105606002)(84676001)(89996001)(50466002)(106466001)(85306003)(81156004)(102836001)(21056001)(48376002)(26826002)(2351001)(104166001)(81342001)(92726001)(229853001)(33646001)(92566001)(83072002)(85852003)(79102001)(19580395003)(19580405001)(44976005)(575784001)(46102001)(83322001)(80022001)(87286001)(6806004)(20776003)(68736004)(47776003)(76176999)(76482001)(62966002)(81542001)(69596002)(87936001)(77982001)(77156001)(36756003)(50986999)(99396002)(64706001)(31966008)(74662001)(97736001)(93916002)(74502001)(50226001)(4396001)(86362001)(2004002); DIR:OUT; SFP:; SCL:1; SRVR:BY2PR03MB221; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-Forefront-PRVS: 0260457E99 Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=jingchang.lu@freescale.com; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140702_024854_870669_31D38DB7 X-CRM114-Status: GOOD ( 10.53 ) X-Spam-Score: -0.7 (/) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Chao Fu , Alison Wang , Bhupesh Sharma , Xiubo Li , Jason Jin , Jingchang Lu , Jingchang Lu , linux-arm-kernel@lists.infradead.org, Jaiprakash Singh X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jingchang Lu Signed-off-by: Alison Wang Signed-off-by: Chao Fu Signed-off-by: Jason Jin Signed-off-by: Xiubo Li Signed-off-by: Bhupesh Sharma Signed-off-by: Jaiprakash Singh Signed-off-by: Jingchang Lu --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/ls1021a-qds.dts | 380 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 382 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/ls1021a-qds.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b9e7adc..0569312 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -235,7 +235,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6sx-sdb.dtb \ vf610-colibri.dtb \ vf610-cosmic.dtb \ - vf610-twr.dtb + vf610-twr.dtb \ + ls1021a-qds.dtb dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx23-olinuxino.dtb \ imx23-stmp378x_devb.dtb \ diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts new file mode 100644 index 0000000..586165c --- /dev/null +++ b/arch/arm/boot/dts/ls1021a-qds.dts @@ -0,0 +1,380 @@ +/* + * Copyright 2013-2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; +#include "ls1021a.dtsi" + +/ { + model = "LS1021A QDS Board"; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_3p3v: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + + sound { + compatible = "fsl,vf610-sgtl5000"; + simple-audio-card,name = "FSL-VF610-TWR-BOARD"; + simple-audio-card,routing = + "MIC_IN", "Microphone Jack", + "Microphone Jack", "Mic Bias", + "LINE_IN", "Line In Jack", + "Headphone Jack", "HP_OUT", + "Speaker Ext", "LINE_OUT"; + + simple-audio-card,cpu = <&sai2>; + + simple-audio-card,codec = <&codec>; + }; + + soc { + leds { + compatible = "pwm-leds"; + led0 { + label = "led0"; + pwms = <&pwm3 0 150000 0>; + max-brightness = <100>; + }; + led1 { + label = "led1"; + pwms = <&pwm3 1 150000 0>; + max-brightness = <100>; + }; + led2 { + label = "led2"; + pwms = <&pwm3 2 150000 0>; + max-brightness = <100>; + }; + led3 { + label = "led3"; + pwms = <&pwm3 3 150000 0>; + max-brightness = <100>; + }; + led4 { + label = "led4"; + pwms = <&pwm3 4 150000 0>; + max-brightness = <100>; + }; + led5 { + label = "led5"; + pwms = <&pwm3 5 150000 0>; + max-brightness = <100>; + }; + led6 { + label = "led6"; + pwms = <&pwm3 6 150000 0>; + max-brightness = <100>; + }; + led7 { + label = "led7"; + pwms = <&pwm3 7 150000 0>; + max-brightness = <100>; + }; + }; + }; +}; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +&dspi0 { + bus-num = <0>; + status = "okay"; + + dspiflash: at45db021d@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "atmel,at45db021d", "atmel,at45", "atmel,dataflash"; + spi-max-frequency = <16000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; +}; + +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; + +&enet0 { + tbi-handle = <&tbi0>; + phy-handle = <&physgmii1c>; + phy-connection-type = "sgmii"; + status = "okay"; +}; + +&enet1 { + tbi-handle = <&tbi0>; + phy-handle = <&physgmii1d>; + phy-connection-type = "sgmii"; + status = "okay"; +}; + +&enet2 { + phy-handle = <&phyrgmii3>; + phy-connection-type = "rgmii"; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + pca9547@77 { + compatible = "philips,pca9547"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + + rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; + interrupts = ; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2>; + + ina220@40 { + compatible = "ti,ina220"; + reg = <0x40>; + shunt-resistor = <1000>; + }; + + ina220@41 { + compatible = "ti,ina220"; + reg = <0x41>; + shunt-resistor = <1000>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + + eeprom@56 { + compatible = "at24,24c512"; + reg = <0x56>; + }; + + eeprom@57 { + compatible = "at24,24c512"; + reg = <0x57>; + }; + + adt7461a@4c { + compatible = "adt7461a"; + reg = <0x4c>; + }; + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4>; + + codec: sgtl5000@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + clocks = <&platform_clk 1>; + }; + }; + + }; + +}; + +&ifc { + status = "okay"; + #address-cells = <2>; + #size-cells = <1>; + /* NOR, NAND Flashes and FPGA on board */ + ranges = <0x0 0x0 0x0 0x60000000 0x08000000 + 0x2 0x0 0x0 0x7e800000 0x00010000 + 0x3 0x0 0x0 0x7fb00000 0x00000100>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + }; + + nand@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,ifc-nand"; + reg = <0x2 0x0 0x10000>; + + partition@0 { + /* This location must not be altered */ + /* 1MB for u-boot Bootloader Image */ + reg = <0x0 0x00100000>; + label = "NAND U-Boot Image"; + read-only; + }; + + partition@100000 { + /* 1MB for DTB Image */ + reg = <0x00100000 0x00100000>; + label = "NAND DTB Image"; + }; + + partition@200000 { + /* 10MB for Linux Kernel Image */ + reg = <0x00200000 0x00a00000>; + label = "NAND Linux Kernel Image"; + }; + + partition@c00000 { + /* 500MB for Root file System Image */ + reg = <0x00c00000 0x1f400000>; + label = "NAND Compressed RFS Image"; + }; + }; + + fpga: board-control@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,ls1021aqds-fpga", "fsl,fpga-qixis"; + reg = <0x3 0x0 0x0000100>; + bank-width = <1>; + device-width = <1>; + ranges = <0 3 0 0x100>; + + mdio-mux-emi1 { + compatible = "mdio-mux-mmioreg"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1[2:0] */ + + /* Onboard PHYs */ + ls1021amdio0: mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + phyrgmii1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + ls1021amdio1: mdio@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + phyrgmii2: ethernet-phy@2 { + reg = <0x2>; + }; + }; + ls1021amdio2: mdio@40 { + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + phyrgmii3: ethernet-phy@3 { + reg = <0x3>; + }; + }; + ls1021amdio3: mdio@60 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + physgmii1c: ethernet-phy@1c { + reg = <0x1c>; + }; + }; + ls1021amdio4: mdio@80 { + reg = <0x80>; + #address-cells = <1>; + #size-cells = <0>; + physgmii1d: ethernet-phy@1d { + reg = <0x1d>; + }; + }; + + }; + + }; +}; + +&lpuart0 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + +&pwm7 { + status = "okay"; +}; + +&qspi { + num-cs = <2>; + bus-num = <0>; + fsl,spi-num-chipselects = <2>; + fsl,spi-flash-chipselects = <0>; + status = "okay"; + + qflash0: s25fl128s@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl129p1"; + spi-max-frequency = <20000000>; + reg = <0>; + + partition@0 { + label = "s25fl128s-0"; + reg = <0x0 0x1000000>; + }; + }; + + qflash1: s25fl128s@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl129p1"; + spi-max-frequency = <20000000>; + reg = <1>; + + partition@0x0 { + label = "s25fl128s-1"; + reg = <0x0 0x1000000>; + }; + }; +};