From patchwork Fri Jul 4 11:13:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 4480891 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1ABA2BEEAA for ; Fri, 4 Jul 2014 11:16:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A752D201E4 for ; Fri, 4 Jul 2014 11:16:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4347B20179 for ; Fri, 4 Jul 2014 11:16:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X31S5-0007kx-Hz; Fri, 04 Jul 2014 11:14:49 +0000 Received: from mail-wi0-f172.google.com ([209.85.212.172]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X31Rx-0007TO-Fy for linux-arm-kernel@lists.infradead.org; Fri, 04 Jul 2014 11:14:42 +0000 Received: by mail-wi0-f172.google.com with SMTP id hi2so12887429wib.17 for ; Fri, 04 Jul 2014 04:14:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JqyksE0Oig+MO5CPXYaMABXPMuutZ71lnUn23j939dY=; b=klj4p8r+1K77GnHqXkiomd46VZjY9y5Q6lWJWE+wLspGIPokGMaVixyAPJt+Jy+Zlj knL+GBYVHD9Vlv3pUUuSHM5ymT+yzkzLKxc9IndHjm+Wwjf/GCjkdNP1xC3sDNhsnq4b H+DvFPDOlwbkS2fxvU9sfcg/0xNsUnZU0ZBXHvt6bvMuGkbxIacavdNV4Cq9HcnbEr98 8xuOjPoubHw2+zeUJ9ndQzeYIkItRxyhm0SRA+12/m3nxSbjsVVSs2AH9KZPzNy4XBT8 1qIlhzCvt8aeHMrMy5a+eGvgyvW9J/zoOv51tIMK6Q3YuKEzogk06WO+9B3BZNeBSnxF zt6g== X-Gm-Message-State: ALoCoQn3GtFatkF/re2Br8z6UDN2aykUwJeggSgXhgxootW/1ZN78QPux+PEJKxsuPnlYom5ULUf X-Received: by 10.180.218.72 with SMTP id pe8mr19373679wic.63.1404472459076; Fri, 04 Jul 2014 04:14:19 -0700 (PDT) Received: from localhost.localdomain (cpc14-aztw22-2-0-cust189.18-1.cable.virginm.net. [82.45.1.190]) by mx.google.com with ESMTPSA id 10sm31337838wjr.22.2014.07.04.04.14.17 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 04 Jul 2014 04:14:18 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maxime.coquelin@st.com, patrice.chotard@st.com, srinivas.kandagatla@gmail.com, devicetree@vger.kernel.org, balbi@ti.com, linux-usb@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 1/3] usb: dwc3: add ST dwc3 glue layer to manage dwc3 HC Date: Fri, 4 Jul 2014 12:13:50 +0100 Message-Id: <1404472432-24764-2-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1404472432-24764-1-git-send-email-peter.griffin@linaro.org> References: <1404472432-24764-1-git-send-email-peter.griffin@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140704_041441_865228_D4FC84A4 X-CRM114-Status: GOOD ( 22.95 ) X-Spam-Score: -0.7 (/) Cc: peter.griffin@linaro.org, Giuseppe Cavallaro , lee.jones@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the ST glue logic to manage the DWC3 HC on STiH407 SoC family. It manages the powerdown signal, and configures the internal glue logic and syscfg registers. Signed-off-by: Giuseppe Cavallaro Signed-off-by: Peter Griffin --- drivers/usb/dwc3/Kconfig | 9 ++ drivers/usb/dwc3/Makefile | 1 + drivers/usb/dwc3/dwc3-st.c | 325 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 335 insertions(+) create mode 100644 drivers/usb/dwc3/dwc3-st.c diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 8eb996e..f7b0518 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -77,6 +77,15 @@ config USB_DWC3_KEYSTONE default USB_DWC3 help Support of USB2/3 functionality in TI Keystone2 platforms. + +config USB_DWC3_ST + tristate "STMicroelectronics Platforms" + depends on ARCH_STI && OF + default USB_DWC3_HOST + help + STMicroelectronics SoCs chip with one DesignWare Core USB3 IP + inside (i.e. STiH407). + Say 'Y' or 'M' here if you have one such device comment "Debugging features" diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index 10ac3e7..11c9f54 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -33,3 +33,4 @@ obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o obj-$(CONFIG_USB_DWC3_EXYNOS) += dwc3-exynos.o obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o obj-$(CONFIG_USB_DWC3_KEYSTONE) += dwc3-keystone.o +obj-$(CONFIG_USB_DWC3_ST) += dwc3-st.o diff --git a/drivers/usb/dwc3/dwc3-st.c b/drivers/usb/dwc3/dwc3-st.c new file mode 100644 index 0000000..80b1b8f --- /dev/null +++ b/drivers/usb/dwc3/dwc3-st.c @@ -0,0 +1,325 @@ +/** + * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms + * + * This is a small platform driver for the dwc3 to provide the glue logic + * to configure the controller. Tested on STi platforms. + * + * Copyright (C) 2014 Stmicroelectronics + * + * Author: Giuseppe Cavallaro + * Contributors: Aymen Bouattay + * Peter Griffin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * Inspired by dwc3-omap.c and dwc3-exynos.c. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "core.h" +#include "io.h" + +/* Reg glue registers */ +#define USB2_CLKRST_CTRL 0x00 +#define aux_clk_en(n) ((n)<<0) +#define sw_pipew_reset_n(n) ((n)<<4) +#define ext_cfg_reset_n(n) ((n)<<8) +#define xhci_revision(n) ((n)<<12) + +#define USB2_VBUS_MNGMNT_SEL1 0x2C +/* + * 2'b00 : Override value from Reg 0x30 is selected + * 2'b01 : utmiotg_vbusvalid from usb3_top top is selected + * 2'b10 : pipew_powerpresent from PIPEW instance is selected + * 2'b11 : value is 1'b0 + */ +#define SEL_OVERRIDE_VBUSVALID(n) ((n)<<0) +#define SEL_OVERRIDE_POWERPRESENT(n) ((n)<<4) +#define SEL_OVERRIDE_BVALID(n) ((n)<<8) + +#define USB2_VBUS_MNGMNT_VAL1 0x30 +#define OVERRIDE_VBUSVALID_VAL (1 << 0) +#define OVERRIDE_POWERPRESENT_VAL (1 << 4) +#define OVERRIDE_BVALID_VAL (1 << 8) + +/* Static DRD configuration */ +#define USB_HOST_DEFAULT_MASK 0xffe +#define USB_SET_PORT_DEVICE 0x1 + +struct st_dwc3 { + struct platform_device *dwc3; /* platform device pointer */ + struct device *dev; /* device pointer */ + void __iomem *glue_base; /* ioaddr for programming the glue */ + struct regmap *regmap; /* regmap for getting syscfg */ + int syscfg_reg_off; /* usb syscfg control offset */ + bool drd_device_conf; /* DRD static host/device conf */ + struct reset_control *rstc_pwrdn;/* Rst control for powerdown*/ +}; + +static inline u32 st_dwc3_readl(void __iomem *base, u32 offset) +{ + return readl_relaxed(base + offset); +} + +static inline void st_dwc3_writel(void __iomem *base, u32 offset, u32 value) +{ + writel_relaxed(value, base + offset); +} + +/** + * st_dwc3_drd_init: program the port + * @dwc3_data: driver private structure + * Description: this function is to program the port as either host or device + * according to the static configuration passed from devicetree. + * OTG and dual role are not yet supported! + */ +static int st_dwc3_drd_init(struct st_dwc3 *dwc3_data) +{ + u32 val; + + regmap_read(dwc3_data->regmap, dwc3_data->syscfg_reg_off, &val); + + if (dwc3_data->drd_device_conf) + val |= USB_SET_PORT_DEVICE; + else + val &= USB_HOST_DEFAULT_MASK; + + return regmap_write(dwc3_data->regmap, dwc3_data->syscfg_reg_off, val); +} + +/** + * st_dwc3_init: init the controller via glue logic + * @dwc3_data: driver private structure + */ +static void st_dwc3_init(struct st_dwc3 *dwc3_data) +{ + u32 reg = st_dwc3_readl(dwc3_data->glue_base, USB2_CLKRST_CTRL); + + reg |= aux_clk_en(1) | ext_cfg_reset_n(1) | xhci_revision(1); + reg &= ~sw_pipew_reset_n(1); + st_dwc3_writel(dwc3_data->glue_base, USB2_CLKRST_CTRL, reg); + + reg = st_dwc3_readl(dwc3_data->glue_base, USB2_VBUS_MNGMNT_SEL1); + reg |= SEL_OVERRIDE_VBUSVALID(1) | SEL_OVERRIDE_POWERPRESENT(1) | + SEL_OVERRIDE_BVALID(1); + st_dwc3_writel(dwc3_data->glue_base, USB2_VBUS_MNGMNT_SEL1, reg); + udelay(100); + + reg = st_dwc3_readl(dwc3_data->glue_base, USB2_CLKRST_CTRL); + reg |= sw_pipew_reset_n(1); + st_dwc3_writel(dwc3_data->glue_base, USB2_CLKRST_CTRL, reg); +} + +static void st_dwc3_dt_get_pdata(struct platform_device *pdev, + struct st_dwc3 *dwc3_data) +{ + struct device_node *np = pdev->dev.of_node; + + dwc3_data->drd_device_conf = + of_property_read_bool(np, "st,dwc3-drd-device"); +} + +/** + * st_dwc3_probe: main probe function + * @pdev: platform_device + * Description: this is the probe function that gets all the resources to manage + * the glue-logic, setup the controller and take out of powerdown. + */ +static int st_dwc3_probe(struct platform_device *pdev) +{ + struct platform_device *dwc3; + struct st_dwc3 *dwc3_data; + struct resource *res; + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct regmap *regmap; + int ret = 0; + + if (!node) { + dev_err(dev, "device node not found\n"); + return -EINVAL; + } + + dwc3_data = devm_kzalloc(dev, sizeof(*dwc3_data), GFP_KERNEL); + if (!dwc3_data) + return -ENOMEM; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg-glue"); + if (!res) + return -ENXIO; + + dwc3_data->glue_base = devm_request_and_ioremap(dev, res); + if (!dwc3_data->glue_base) + return -EADDRNOTAVAIL; + + regmap = syscon_regmap_lookup_by_phandle(node, "st,syscfg"); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + dwc3 = platform_device_alloc("st-dwc3", PLATFORM_DEVID_AUTO); + if (!dwc3) { + dev_err(&pdev->dev, "couldn't allocate dwc3 device\n"); + return -ENOMEM; + } + + dma_set_coherent_mask(&dwc3->dev, dev->coherent_dma_mask); + + dwc3->dev.parent = &pdev->dev; + dwc3->dev.dma_mask = pdev->dev.dma_mask; + dwc3->dev.dma_parms = pdev->dev.dma_parms; + + dwc3_data->dwc3 = dwc3; + dwc3_data->dev = &pdev->dev; + dwc3_data->regmap = regmap; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "syscfg-reg"); + if (!res) { + ret = -ENXIO; + goto undo_platform_dev_alloc; + } + + dwc3_data->syscfg_reg_off = res->start; + + dev_info(&pdev->dev, "glue-logic addr 0x%p, syscfg-reg offset 0x%x\n", + dwc3_data->glue_base, dwc3_data->syscfg_reg_off); + + dwc3_data->rstc_pwrdn = devm_reset_control_get(dwc3_data->dev, NULL); + if (IS_ERR(dwc3_data->rstc_pwrdn)) { + dev_err(&pdev->dev, "could not get reset controller\n"); + ret = PTR_ERR(dwc3_data->rstc_pwrdn); + goto undo_platform_dev_alloc; + } + + /* Manage PowerDown */ + reset_control_deassert(dwc3_data->rstc_pwrdn); + + st_dwc3_dt_get_pdata(pdev, dwc3_data); + + /* Allocate and initialize the core */ + ret = of_platform_populate(node, NULL, NULL, dev); + if (ret) { + dev_err(dev, "failed to add dwc3 core\n"); + goto undo_powerdown; + } + + /* + * Configure the USB port as device or host according to the static + * configuration passed from the platform. + * DRD is the only mode currently supported so this will be enhanced + * later as soon as OTG will be available. + */ + ret = st_dwc3_drd_init(dwc3_data); + if (ret) { + dev_err(dev, "st_dwc3_drd_init failed\n"); + goto undo_powerdown; + } + + dev_info(&pdev->dev, "configured as %s DRD\n", + dwc3_data->drd_device_conf ? "device" : "host"); + + /* ST glue logic init */ + st_dwc3_init(dwc3_data); + + ret = platform_device_add_resources(dwc3_data->dwc3, pdev->resource, + pdev->num_resources); + if (ret) { + dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n"); + goto undo_powerdown; + } + + ret = platform_device_add(dwc3_data->dwc3); + if (ret) { + dev_err(&pdev->dev, "failed to register dwc3 device\n"); + goto undo_powerdown; + } + + platform_set_drvdata(pdev, dwc3_data); + + return 0; + +undo_powerdown: + reset_control_assert(dwc3_data->rstc_pwrdn); +undo_platform_dev_alloc: + platform_device_put(pdev); + + return ret; + +} + +static int st_dwc3_remove(struct platform_device *pdev) +{ + struct st_dwc3 *dwc3_data = platform_get_drvdata(pdev); + + platform_device_unregister(dwc3_data->dwc3); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int st_dwc3_suspend(struct device *dev) +{ + struct st_dwc3 *dwc3_data = dev_get_drvdata(dev); + + reset_control_assert(dwc3_data->rstc_pwrdn); + + pinctrl_pm_select_sleep_state(dev); + + return 0; +} + +static int st_dwc3_resume(struct device *dev) +{ + struct st_dwc3 *dwc3_data = dev_get_drvdata(dev); + + pinctrl_pm_select_default_state(dev); + + reset_control_deassert(dwc3_data->rstc_pwrdn); + + return 0; +} + +#endif /* CONFIG_PM_SLEEP */ + +static const struct dev_pm_ops st_dwc3_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(st_dwc3_suspend, st_dwc3_resume) +}; + +static struct of_device_id st_dwc3_match[] = { + { .compatible = "st,stih407-dwc3" }, + { /* sentinel */ }, +}; + +MODULE_DEVICE_TABLE(of, st_dwc3_match); + +static struct platform_driver st_dwc3_driver = { + .probe = st_dwc3_probe, + .remove = st_dwc3_remove, + .driver = { + .name = "usb-st-dwc3", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(st_dwc3_match), + .pm = &st_dwc3_dev_pm_ops, + }, +}; + +module_platform_driver(st_dwc3_driver); + +MODULE_AUTHOR("Giuseppe Cavallaro "); +MODULE_DESCRIPTION("DesignWare USB3 STi Glue Layer"); +MODULE_LICENSE("GPL v2");