From patchwork Sat Jul 5 05:36:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 4486371 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C62969F26C for ; Sat, 5 Jul 2014 05:39:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 08237202EC for ; Sat, 5 Jul 2014 05:39:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 837DA203EB for ; Sat, 5 Jul 2014 05:39:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X3Ieg-0002pi-PD; Sat, 05 Jul 2014 05:36:58 +0000 Received: from smtp38.i.mail.ru ([94.100.177.98]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X3IeX-0002nD-5A for linux-arm-kernel@lists.infradead.org; Sat, 05 Jul 2014 05:36:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=KLr1jkZ87U6zv9uGI5tBhT/QKrGEnTNUmbuqcVLd66k=; b=MXAUWpoycjZkOl4ipvhugFAyapLc1HLqrJKv7eh2+CWT608epwsZsHmT3wg7Xk9+GqQDQ+QzOncWo8MPyVRthlJwSmW6yC5umhRRGNtP++/BS0Knmq+AvhQZoVwxy7JoO+yHVMD+giCPADco1k/6rop2qbJ7uU1Y8nQC4O6Wnvo=; Received: from [5.18.98.7] (port=60377 helo=shc.zet) by smtp38.i.mail.ru with esmtpa (envelope-from ) id 1X3IeB-0001qS-1J; Sat, 05 Jul 2014 09:36:28 +0400 From: Alexander Shiyan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/4] ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gate Date: Sat, 5 Jul 2014 09:36:09 +0400 Message-Id: <1404538569-3076-4-git-send-email-shc_work@mail.ru> X-Mailer: git-send-email 1.8.5.5 In-Reply-To: <1404538569-3076-1-git-send-email-shc_work@mail.ru> References: <1404538569-3076-1-git-send-email-shc_work@mail.ru> X-Mras: Ok X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140704_223649_812728_D11DC4E2 X-CRM114-Status: GOOD ( 10.44 ) X-Spam-Score: -0.1 (/) Cc: Alexander Shiyan , Sascha Hauer , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, FREEMAIL_FROM, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds missing 26 MHz oscillator circuit clock gate support. Signed-off-by: Alexander Shiyan --- arch/arm/mach-imx/clk-imx27.c | 11 ++++++----- include/dt-bindings/clock/imx27-clock.h | 3 ++- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index fcfb81b..07bc32c 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -27,10 +27,10 @@ static void __iomem *ccm __initdata; static const char *vpu_sel_clks[] = { "spll", "mpll_main2", }; static const char *cpu_sel_clks[] = { "mpll_main2", "mpll", }; static const char *mpll_sel_clks[] = { "fpm", "mpll_osc_sel", }; -static const char *mpll_osc_sel_clks[] = { "ckih", "ckih_div1p5", }; +static const char *mpll_osc_sel_clks[] = { "ckih_gate", "ckih_div1p5", }; static const char *clko_sel_clks[] = { - "ckil", "fpm", "ckih", "ckih", - "ckih", "mpll", "spll", "cpu_div", + "ckil", "fpm", "ckih_gate", "ckih_gate", + "ckih_gate", "mpll", "spll", "cpu_div", "ahb", "ipg", "per1_div", "per2_div", "per3_div", "per4_div", "ssi1_div", "ssi2_div", "nfc_div", "mshc_div", "vpu_div", "60m", @@ -50,11 +50,12 @@ static void __init _mx27_clocks_init(unsigned long fref) clk[IMX27_CLK_CKIH] = imx_clk_fixed("ckih", fref); clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768); clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); - clk[IMX27_CLK_CKIH_DIV1P5] = imx_clk_fixed_factor("ckih_div1p5", "ckih", 2, 3); + clk[IMX27_CLK_CKIH_DIV1P5] = imx_clk_fixed_factor("ckih_div1p5", "ckih_gate", 2, 3); + clk[IMX27_CLK_CKIH_GATE] = imx_clk_gate_dis("ckih_gate", "ckih", CCM_CSCR, 3); clk[IMX27_CLK_MPLL_OSC_SEL] = imx_clk_mux("mpll_osc_sel", CCM_CSCR, 4, 1, mpll_osc_sel_clks, ARRAY_SIZE(mpll_osc_sel_clks)); clk[IMX27_CLK_MPLL_SEL] = imx_clk_mux("mpll_sel", CCM_CSCR, 16, 1, mpll_sel_clks, ARRAY_SIZE(mpll_sel_clks)); clk[IMX27_CLK_MPLL] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0); - clk[IMX27_CLK_SPLL] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0); + clk[IMX27_CLK_SPLL] = imx_clk_pllv1("spll", "ckih_gate", CCM_SPCTL0); clk[IMX27_CLK_SPLL_GATE] = imx_clk_gate("spll_gate", "spll", CCM_CSCR, 1); clk[IMX27_CLK_MPLL_MAIN2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3); diff --git a/include/dt-bindings/clock/imx27-clock.h b/include/dt-bindings/clock/imx27-clock.h index 6b642d4..148b053 100644 --- a/include/dt-bindings/clock/imx27-clock.h +++ b/include/dt-bindings/clock/imx27-clock.h @@ -102,6 +102,7 @@ #define IMX27_CLK_MSHC_IPG_GATE 89 #define IMX27_CLK_RTIC_AHB_GATE 90 #define IMX27_CLK_MSHC_BAUD_GATE 91 -#define IMX27_CLK_MAX 92 +#define IMX27_CLK_CKIH_GATE 92 +#define IMX27_CLK_MAX 93 #endif