@@ -211,6 +211,19 @@ static const struct irq_domain_ops aic_irq_ops = {
.xlate = aic_irq_domain_xlate,
};
+static void __init at91sam9_aic_irq_fixup(struct device_node *root)
+{
+ aic_common_rtc_irq_fixup(root);
+}
+
+static const struct of_device_id __initdata aic_irq_fixups[] = {
+ { .compatible = "atmel,at91sam9g45", .data = at91sam9_aic_irq_fixup },
+ { .compatible = "atmel,at91sam9n12", .data = at91sam9_aic_irq_fixup },
+ { .compatible = "atmel,at91sam9rl", .data = at91sam9_aic_irq_fixup },
+ { .compatible = "atmel,at91sam9x5", .data = at91sam9_aic_irq_fixup },
+ { /* sentinel */ },
+};
+
static int __init aic_of_init(struct device_node *node,
struct device_node *parent)
{
@@ -225,6 +238,8 @@ static int __init aic_of_init(struct device_node *node,
if (IS_ERR(domain))
return PTR_ERR(domain);
+ aic_common_irq_fixup(aic_irq_fixups);
+
aic_domain = domain;
gc = irq_get_domain_generic_chip(domain, 0);
@@ -290,6 +290,16 @@ static const struct irq_domain_ops aic5_irq_ops = {
.xlate = aic5_irq_domain_xlate,
};
+static void __init sama5d3_aic_irq_fixup(struct device_node *root)
+{
+ aic_common_rtc_irq_fixup(root);
+}
+
+static const struct of_device_id __initdata aic5_irq_fixups[] = {
+ { .compatible = "atmel,sama5d3", .data = sama5d3_aic_irq_fixup },
+ { /* sentinel */ },
+};
+
static int __init aic5_of_init(struct device_node *node,
struct device_node *parent,
int nirqs)
@@ -310,6 +320,8 @@ static int __init aic5_of_init(struct device_node *node,
if (IS_ERR(domain))
return PTR_ERR(domain);
+ aic_common_irq_fixup(aic5_irq_fixups);
+
aic5_domain = domain;
nchips = aic5_domain->revmap_size / 32;
for (i = 0; i < nchips; i++) {
Define SoCs that need irq fixups before enabling the AIC irqchip. At the moment we're only fixing irq generated by the RTC block, but other fixups will be added later on. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> --- drivers/irqchip/irq-atmel-aic.c | 15 +++++++++++++++ drivers/irqchip/irq-atmel-aic5.c | 12 ++++++++++++ 2 files changed, 27 insertions(+)