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Fri, 11 Jul 2014 03:32:51 -0700 From: Dong Aisheng To: Subject: [PATCH v3 1/2] can: m_can: add device tree binding documentation Date: Fri, 11 Jul 2014 18:29:16 +0800 Message-ID: <1405074557-5519-1-git-send-email-b29396@freescale.com> X-Mailer: git-send-email 1.7.8 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(87936001)(68736004)(110136001)(107046002)(229853001)(106466001)(69596002)(81542001)(6806004)(19580405001)(85852003)(19580395003)(77982001)(83072002)(104166001)(76482001)(46102001)(44976005)(83322001)(81156004)(62966002)(64706001)(31966008)(74662001)(50466002)(95666004)(97736001)(79102001)(84676001)(85306003)(92566001)(93916002)(33646001)(88136002)(26826002)(92726001)(87286001)(74502001)(81342001)(4396001)(102836001)(50986999)(99396002)(89996001)(48376002)(105606002)(77156001)(21056001)(47776003)(36756003)(50226001)(80022001)(104016003)(20776003)(2351001)(42262001); DIR:OUT; SFP:; SCL:1; SRVR:BLUPR03MB326; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-Forefront-PRVS: 02698DF457 Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Aisheng.Dong@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140711_033326_237039_624AB502 X-CRM114-Status: GOOD ( 10.59 ) X-Spam-Score: -1.9 (-) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, socketcan@hartkopp.net, varkabhadram@gmail.com, mkl@pengutronix.de, wg@grandegger.com, b29396@freescale.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP add M_CAN device tree binding documentation Cc: Wolfgang Grandegger Cc: Marc Kleine-Budde Cc: Mark Rutland Cc: Oliver Hartkopp Cc: Varka Bhadram Signed-off-by: Dong Aisheng --- .../devicetree/bindings/net/can/m_can.txt | 65 ++++++++++++++++++++ 1 files changed, 65 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/can/m_can.txt diff --git a/Documentation/devicetree/bindings/net/can/m_can.txt b/Documentation/devicetree/bindings/net/can/m_can.txt new file mode 100644 index 0000000..c4cb263 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/m_can.txt @@ -0,0 +1,65 @@ +Bosch MCAN controller Device Tree Bindings +------------------------------------------------- + +Required properties: +- compatible : Should be "bosch,m_can" for M_CAN controllers +- reg : physical base address and size of the M_CAN + registers map and Message RAM +- reg-names : Should be "m_can" and "message_ram" +- interrupts : Should be the interrupt number of M_CAN interrupt + line 0 and line 1, could be same if sharing + the same interrupt. +- interrupt-names : Should contain "int0" and "int1" +- clocks : Clocks used by controller, should be host clock + and CAN clock. +- clock-names : Should contain "hclk" and "cclk" +- pinctrl- : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt +- pinctrl-names : Names corresponding to the numbered pinctrl states +- mram-cfg : Message RAM configuration data. + Multiple M_CAN instances can share the same Message RAM and each element(e.g + Rx FIFO or Tx Buffer and etc) number in Message RAM is also configurable, + so this property is telling driver how the shared or private Message RAM + are used by this M_CAN controller. + + The format should be as follows: + + The 'offset' is an address offset of the Message RAM where the following + elements start from. This is usually set to 0x0 if you're using a private + Message RAM. The remain cells are used to specify how many elements are used + for each FIFO/Buffer. + +M_CAN includes the following elements according to user manual: +11-bit Filter 0-128 elements / 0-128 words +29-bit Filter 0-64 elements / 0-128 words +Rx FIFO 0 0-64 elements / 0-1152 words +Rx FIFO 1 0-64 elements / 0-1152 words +Rx Buffers 0-64 elements / 0-1152 words +Tx Event FIFO 0-32 elements / 0-64 words +Tx Buffers 0-32 elements / 0-576 words + +Please refer to 2.4.1 Message RAM Configuration in Bosch M_CAN user manual +for details. + +Example: +SoC dtsi: +m_can1: can@020e8000 { + compatible = "bosch,m_can"; + reg = <0x020e8000 0x4000>, <0x02298000 0x4000>; + reg-names = "m_can", "message_ram"; + interrupts = <0 114 0x04>, + <0 114 0x04>; + interrupt-names = "int0", "int1"; + clocks = <&clks IMX6SX_CLK_CANFD>, + <&clks IMX6SX_CLK_CANFD>; + clock-names = "hclk", "cclk"; + mram-cfg = <0x0 0 0 32 0 0 0 1>; + status = "disabled"; +}; + +Board dtsi: +&m_can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_m_can1>; + status = "enabled"; +};