From patchwork Wed Jul 16 16:10:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 4568341 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3078D9F295 for ; Wed, 16 Jul 2014 16:12:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6A5392010B for ; Wed, 16 Jul 2014 16:12:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E3E22011D for ; Wed, 16 Jul 2014 16:12:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X7Rmv-0000T5-5A; Wed, 16 Jul 2014 16:10:37 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X7Rms-0000LG-Ai for linux-arm-kernel@lists.infradead.org; Wed, 16 Jul 2014 16:10:35 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 22B8913F716; Wed, 16 Jul 2014 16:10:15 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 04A2413F71A; Wed, 16 Jul 2014 16:10:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from galak-ubuntu.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: galak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 64BD013F716; Wed, 16 Jul 2014 16:10:13 +0000 (UTC) From: Kumar Gala To: Kishon Vijay Abraham I Subject: [PATCH v8 2/2] phy: qcom: Add device tree bindings for IPQ806x SATA PHY Date: Wed, 16 Jul 2014 11:10:09 -0500 Message-Id: <1405527009-17539-2-git-send-email-galak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1405527009-17539-1-git-send-email-galak@codeaurora.org> References: <1405527009-17539-1-git-send-email-galak@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140716_091034_398488_5D6430C6 X-CRM114-Status: GOOD ( 11.43 ) X-Spam-Score: -0.0 (/) Cc: Mark Rutland , devicetree , Pawel Moll , Ian Campbell , linux-arm-msm , linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org, Rob Herring , Kumar Gala , Tejun Heo , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on the IPQ806x family of SoCs. Signed-off-by: Kumar Gala --- v8, v7: * no change v6: * Moved binding to qcom-ipq806x-sata-phy.txt instead of qcom-phy.txt .../bindings/phy/qcom-ipq806x-sata-phy.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt diff --git a/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt b/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt new file mode 100644 index 0000000..76bfbd0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt @@ -0,0 +1,23 @@ +Qualcomm IPQ806x SATA PHY Controller +------------------------------------ + +SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. +Each SATA PHY controller should have its own node. + +Required properties: +- compatible: compatible list, contains "qcom,ipq806x-sata-phy" +- reg: offset and length of the SATA PHY register set; +- #phy-cells: must be zero +- clocks: must be exactly one entry +- clock-names: must be "cfg" + +Example: + sata_phy: sata-phy@1b400000 { + compatible = "qcom,ipq806x-sata-phy"; + reg = <0x1b400000 0x200>; + + clocks = <&gcc SATA_PHY_CFG_CLK>; + clock-names = "cfg"; + + #phy-cells = <0>; + };