arm: clk-imx6q: parent lvds_sel input from upstream clock gates

Commit Message

Lucas Stach July 17, 2014, 10:20 a.m. UTC

The i.MX6 reference manual doesn't make a clear distinction
between the fixed clock divider and the enable gate for the
pcie and sata reference clocks. This lead to the lvds mux
inputs in the imx6q clk driver to be parented from the
ref clock (which is the divider) instead of the actual gate,
which in turn prevents the upstream clock to actually be
enabled when lvds clk out is active.

This fixes a hard machine hang regression in kernel 3.16 for
boards where only pcie is active but no sata, as with this
kernel version the imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.

Reported-by: Arne Ruhnau <[e-mail]>
Signed-off-by: Lucas Stach <[e-mail]>
Tested-by: Arne Ruhnau <[e-mail]>
---
Shawn, this is an urgent fix for 3.16. Can you please
Ack it so arm-soc people can take this directly?
---
 arch/arm/mach-imx/clk-imx6q.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Shawn Guo July 17, 2014, 3:08 p.m. UTC | #1

On Thu, Jul 17, 2014 at 12:20:14PM +0200, Lucas Stach wrote:
> The i.MX6 reference manual doesn't make a clear distinction
> between the fixed clock divider and the enable gate for the
> pcie and sata reference clocks. This lead to the lvds mux
> inputs in the imx6q clk driver to be parented from the
> ref clock (which is the divider) instead of the actual gate,
> which in turn prevents the upstream clock to actually be
> enabled when lvds clk out is active.
> 
> This fixes a hard machine hang regression in kernel 3.16 for
> boards where only pcie is active but no sata, as with this
> kernel version the imx6-pcie driver is no longer enabling
> the upstream clock directly but only lvds clk out.
> 
> Reported-by: Arne Ruhnau <[e-mail]>
> Signed-off-by: Lucas Stach <[e-mail]>
> Tested-by: Arne Ruhnau <[e-mail]>
> ---
> Shawn, this is an urgent fix for 3.16. Can you please
> Ack it so arm-soc people can take this directly?
> ---

Acked-by: Shawn Guo <[e-mail]>

It will conflict with the patch switching to use macro for clock IDs,
which I'm about to send for 3.17, though.

Shawn

Shawn Guo July 18, 2014, 7:55 a.m. UTC | #2

On Thu, Jul 17, 2014 at 11:08:28PM +0800, Shawn Guo wrote:
> On Thu, Jul 17, 2014 at 12:20:14PM +0200, Lucas Stach wrote:
> > The i.MX6 reference manual doesn't make a clear distinction
> > between the fixed clock divider and the enable gate for the
> > pcie and sata reference clocks. This lead to the lvds mux
> > inputs in the imx6q clk driver to be parented from the
> > ref clock (which is the divider) instead of the actual gate,
> > which in turn prevents the upstream clock to actually be
> > enabled when lvds clk out is active.
> > 
> > This fixes a hard machine hang regression in kernel 3.16 for
> > boards where only pcie is active but no sata, as with this
> > kernel version the imx6-pcie driver is no longer enabling
> > the upstream clock directly but only lvds clk out.
> > 
> > Reported-by: Arne Ruhnau <[e-mail]>
> > Signed-off-by: Lucas Stach <[e-mail]>
> > Tested-by: Arne Ruhnau <[e-mail]>
> > ---
> > Shawn, this is an urgent fix for 3.16. Can you please
> > Ack it so arm-soc people can take this directly?
> > ---
> 
> Acked-by: Shawn Guo <[e-mail]>
> 
> It will conflict with the patch switching to use macro for clock IDs,
> which I'm about to send for 3.17, though.

Arnd, Olof,

Please do not apply the patch manually.  I will send you a git tag for
it, so that I can sort out the conflict in my tree.

Shawn

Patch

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 8e795dea02ec..8556c787e59c 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -70,7 +70,7 @@  static const char *cko_sels[] = { "cko1", "cko2", };
 static const char *lvds_sels[] = {
 	"dummy", "dummy", "dummy", "dummy", "dummy", "dummy",
 	"pll4_audio", "pll5_video", "pll8_mlb", "enet_ref",
-	"pcie_ref", "sata_ref",
+	"pcie_ref_125m", "sata_ref_100m",
 };
 
 enum mx6q_clks {
@@ -491,7 +491,7 @@  static void __init imx6q_clocks_init(struct device_node *ccm_node)
 
 	/* All existing boards with PCIe use LVDS1 */
 	if (IS_ENABLED(CONFIG_PCI_IMX6))
-		clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
+		clk_set_parent(clk[lvds1_sel], clk[sata_ref_100m]);
 
 	/* Set initial power mode */
 	imx6q_set_lpm(WAIT_CLOCKED);