From patchwork Fri Jul 18 10:02:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 4581981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 05B369F1D6 for ; Fri, 18 Jul 2014 10:06:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 36B4820120 for ; Fri, 18 Jul 2014 10:06:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5C9B12011E for ; Fri, 18 Jul 2014 10:06:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1X851D-0000AH-QL; Fri, 18 Jul 2014 10:03:59 +0000 Received: from mail-pa0-f46.google.com ([209.85.220.46]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1X851A-0008SQ-J8 for linux-arm-kernel@lists.infradead.org; Fri, 18 Jul 2014 10:03:57 +0000 Received: by mail-pa0-f46.google.com with SMTP id lj1so5069725pab.19 for ; Fri, 18 Jul 2014 03:03:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r6eR8nzwpCpyAsmr1sHJzt4fsApkNhDUpsjfxLALbe0=; b=Gip2GR8Bmg+gXgx63v/+H89GjlglGP94cKsmnJZxQ9daDHmF3o/yfq+6OFX8V0XLrQ 4V6eqmQp2qstNo6J+FQFsTx5Q7+z4gV8Be9+SRrzodar8YC0CNVgJp+v1Ez0z0N6GnGm OUOvaZI2kfTTYOc+kldKa/Fh4SoZ93D01Ef9L8t328Ni2wsm/1zm1z9vf3Mgkr0ev0dZ Dc5aSbWqCqyr3YsvR1igRO0K8Ehf+exQieutzIS2cETXoEggyQOW2RhH7nMIGtukf0WQ adlNCb9jWXGPw9vVcLwhyRkCJOezu0dEKB3hdHFnOb6xzh2mSHmD5G/dufA+GpVG5Tin 8lLw== X-Gm-Message-State: ALoCoQkd3wADia0f+uRjCTIg2SP27EV4zqHzxsrXpd7mPNtYnwrSPS5hlFWuIDa1ARO7+xe4zU9l X-Received: by 10.70.44.168 with SMTP id f8mr3484066pdm.97.1405677815325; Fri, 18 Jul 2014 03:03:35 -0700 (PDT) Received: from localhost ([183.247.163.231]) by mx.google.com with ESMTPSA id r1sm6803461pdo.51.2014.07.18.03.03.29 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 18 Jul 2014 03:03:32 -0700 (PDT) From: Hanjun Guo To: "Rafael J. Wysocki" Subject: [PATCH v3 2/3] ACPI: Don't use acpi_lapic in ACPI core code Date: Fri, 18 Jul 2014 18:02:53 +0800 Message-Id: <1405677774-16787-3-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1405677774-16787-1-git-send-email-hanjun.guo@linaro.org> References: <1405677774-16787-1-git-send-email-hanjun.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140718_030356_654576_158516D2 X-CRM114-Status: GOOD ( 14.16 ) X-Spam-Score: -0.7 (/) Cc: Tony Luck , Graeme Gregory , linaro-acpi@lists.linaro.org, Catalin Marinas , linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, Hanjun Guo , "H. Peter Anvin" , Thomas Gleixner , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Graeme Gregory Now ARM64 support is being added to ACPI so architecture specific values can not be used in core ACPI code. Following on the patch "ACPI / processor: Check if LAPIC is present during initialization" which uses acpi_lapic in acpi_processor.c, on ARM64 platform, GIC is used instead of local APIC, so acpi_lapic is not a suitable value for ARM64. What is actually important at this point is if there is/are CPU entry/entries (Local APIC/SAPIC, GICC) in MADT, so introduce acpi_has_cpu_in_madt() to be arch specific and generic. Signed-off-by: Graeme Gregory Signed-off-by: Hanjun Guo --- arch/ia64/include/asm/acpi.h | 5 +++++ arch/x86/include/asm/acpi.h | 5 +++++ drivers/acpi/acpi_processor.c | 2 +- 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h index 75dc59a..a1d91ab 100644 --- a/arch/ia64/include/asm/acpi.h +++ b/arch/ia64/include/asm/acpi.h @@ -40,6 +40,11 @@ extern int acpi_lapic; #define acpi_noirq 0 /* ACPI always enabled on IA64 */ #define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ #define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ + +static inline bool acpi_has_cpu_in_madt(void) +{ + return !!acpi_lapic; +} #endif #define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ static inline void disable_acpi(void) { } diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index e06225e..0ab4f9f 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h @@ -121,6 +121,11 @@ static inline void arch_acpi_set_pdc_bits(u32 *buf) buf[2] &= ~(ACPI_PDC_C_C2C3_FFH); } +static inline bool acpi_has_cpu_in_madt(void) +{ + return !!acpi_lapic; +} + #else /* !CONFIG_ACPI */ #define acpi_lapic 0 diff --git a/drivers/acpi/acpi_processor.c b/drivers/acpi/acpi_processor.c index 1c08574..1fdf5e0 100644 --- a/drivers/acpi/acpi_processor.c +++ b/drivers/acpi/acpi_processor.c @@ -268,7 +268,7 @@ static int acpi_processor_get_info(struct acpi_device *device) pr->apic_id = apic_id; cpu_index = acpi_map_cpuid(pr->apic_id, pr->acpi_id); - if (!cpu0_initialized && !acpi_lapic) { + if (!cpu0_initialized && !acpi_has_cpu_in_madt()) { cpu0_initialized = 1; /* Handle UP system running SMP kernel, with no LAPIC in MADT */ if ((cpu_index == -1) && (num_online_cpus() == 1))