From patchwork Thu Jul 24 12:59:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 4617691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A8F32C0514 for ; Thu, 24 Jul 2014 13:03:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CF658201DD for ; Thu, 24 Jul 2014 13:03:11 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A3BB3201DC for ; Thu, 24 Jul 2014 13:03:10 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XAId5-0006sj-LW; Thu, 24 Jul 2014 13:00:15 +0000 Received: from mail-pd0-f175.google.com ([209.85.192.175]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XAId0-0005it-0k for linux-arm-kernel@lists.infradead.org; Thu, 24 Jul 2014 13:00:13 +0000 Received: by mail-pd0-f175.google.com with SMTP id r10so3634177pdi.34 for ; Thu, 24 Jul 2014 05:59:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+7Jk2HQabUKIluDwGxkKoY2v0IyiMEL5EU0dVbuPv2k=; b=NPKoMzblYnX7vCfU+yORV3U2hmIoLbCH7WPYLF7CTX+5f03UMuPma9npZiEfgdSbUC pyiymiUYFP6LJq+mSB70m1lW+mHjUw++o2x6gDbXvvsbhRcLwnTpvvVtcrMRR7BzZlgV PFXQLGLcGroMhu2yd4mCLYXGtCvagArhYNQ8Y5t+cvw7NCrnhaEGjOeH54Z+8DPtGGbE iLSJinxJrLMBWhGzQfE+v39YWVXsfqx++ceu2LPKkuKD5Ux6fSoVxaTrOpkG0MeInuoT i/GkPZEkGzziYsZyYYbmw179mlPFLBQrH5vGtEo/QUFkjl9FZa7A1fRZF6f4Kebx7lpp k6BA== X-Gm-Message-State: ALoCoQmeNxQfWcyRhyQrx1s77tz5Bx/qt1LstCGGhd228xn2WoC0GekjcMOm9qu0yiEOLZkpVC0Y X-Received: by 10.70.60.226 with SMTP id k2mr10253963pdr.130.1406206788314; Thu, 24 Jul 2014 05:59:48 -0700 (PDT) Received: from localhost ([183.247.163.231]) by mx.google.com with ESMTPSA id y12sm7369297pdk.21.2014.07.24.05.59.40 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 24 Jul 2014 05:59:47 -0700 (PDT) From: Hanjun Guo To: Catalin Marinas , "Rafael J. Wysocki" , Mark Rutland Subject: [PATCH 1/3] ACPI / ACPICA: Introduce ARM Boot Architecture Flags in FADT Date: Thu, 24 Jul 2014 20:59:15 +0800 Message-Id: <1406206757-15512-2-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1406206757-15512-1-git-send-email-hanjun.guo@linaro.org> References: <1406206757-15512-1-git-send-email-hanjun.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140724_060010_083332_79D30D31 X-CRM114-Status: GOOD ( 14.81 ) X-Spam-Score: -0.7 (/) Cc: Mark Brown , Liviu Dudau , Lv Zheng , Lorenzo Pieralisi , Daniel Lezcano , Robert Moore , linux-acpi@vger.kernel.org, Grant Likely , Charles.Garcia-Tobin@arm.com, Robert Richter , Jason Cooper , Arnd Bergmann , Marc Zyngier , Will Deacon , linaro-acpi-private@linaro.org, Bjorn Helgaas , linux-arm-kernel@lists.infradead.org, Graeme Gregory , Randy Dunlap , linux-kernel@vger.kernel.org, Hanjun Guo , Sudeep Holla X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Power State Coordination Interface (PSCI) defines an API that can be used to coordinate power control amongst the various supervisory systems concurrently running on a device. ACPI support for this technology would require the addition of two flags: PSCI_COMPLIANT and PSCI_USE_HVC. When set, the former signals to the OS that the hardware is PSCI compliant. The latter selects the appropriate conduit for PSCI calls by toggling between Hypervisor Calls (HVC) and Secure Monitor Calls (SMC). An ARM Boot Architecture Flags structure to support new ARM hardware was introduced in FADT in ACPI 5.1, add the code accordingly to implement that in ACPICA core. Since ACPI 5.1 doesn't support self defined PSCI function IDs, which means that only PSCI 0.2+ is supported in ACPI. Signed-off-by: Hanjun Guo --- include/acpi/actbl.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h index 1cc7ef1..e339a28 100644 --- a/include/acpi/actbl.h +++ b/include/acpi/actbl.h @@ -270,7 +270,8 @@ struct acpi_table_fadt { u32 flags; /* Miscellaneous flag bits (see below for individual flags) */ struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */ u8 reset_value; /* Value to write to the reset_register port to reset the system */ - u8 reserved4[3]; /* Reserved, must be zero */ + u16 arm_boot_flags; /* ARM Boot Architecture Flags (see below for individual flags) */ + u8 minor_version; /* Minor version of this FADT structure */ u64 Xfacs; /* 64-bit physical address of FACS */ u64 Xdsdt; /* 64-bit physical address of DSDT */ struct acpi_generic_address xpm1a_event_block; /* 64-bit Extended Power Mgt 1a Event Reg Blk address */ @@ -285,7 +286,7 @@ struct acpi_table_fadt { struct acpi_generic_address sleep_status; /* 64-bit Sleep Status register (ACPI 5.0) */ }; -/* Masks for FADT Boot Architecture Flags (boot_flags) [Vx]=Introduced in this FADT revision */ +/* Masks for FADT IA-PC Boot Architecture Flags (boot_flags) [Vx]=Introduced in this FADT revision */ #define ACPI_FADT_LEGACY_DEVICES (1) /* 00: [V2] System has LPC or ISA bus devices */ #define ACPI_FADT_8042 (1<<1) /* 01: [V3] System has an 8042 controller on port 60/64 */ @@ -296,6 +297,11 @@ struct acpi_table_fadt { #define FADT2_REVISION_ID 3 +/* Masks for FADT ARM Boot Architecture Flags (arm_boot_flags) */ + +#define ACPI_FADT_PSCI_COMPLIANT (1) /* 00: PSCI 0.2+ is implemented */ +#define ACPI_FADT_PSCI_USE_HVC (1<<1) /* 01: HVC must be used instead of SMC as the PSCI conduit */ + /* Masks for FADT flags */ #define ACPI_FADT_WBINVD (1) /* 00: [V1] The WBINVD instruction works properly */ @@ -399,7 +405,7 @@ struct acpi_table_desc { * FADT V5 size: 0x10C */ #define ACPI_FADT_V1_SIZE (u32) (ACPI_FADT_OFFSET (flags) + 4) -#define ACPI_FADT_V2_SIZE (u32) (ACPI_FADT_OFFSET (reserved4[0]) + 3) +#define ACPI_FADT_V2_SIZE (u32) (ACPI_FADT_OFFSET (arm_boot_flags) + 3) #define ACPI_FADT_V3_SIZE (u32) (ACPI_FADT_OFFSET (sleep_control)) #define ACPI_FADT_V5_SIZE (u32) (sizeof (struct acpi_table_fadt))