@@ -668,8 +668,8 @@ static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
u32 table_offset;
u8 bir;
- pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
- &table_offset);
+ pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
+ &table_offset);
bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
table_offset &= PCI_MSIX_TABLE_OFFSET;
phys_addr = pci_resource_start(dev, bir) + table_offset;
@@ -734,22 +734,14 @@ static void msix_program_entries(struct pci_dev *dev,
* single MSI-X irq. A return of zero indicates the successful setup of
* requested MSI-X entries with allocated irqs or non-zero for otherwise.
**/
-static int msix_capability_init(struct pci_dev *dev,
+static int msix_capability_init(struct pci_dev *dev, void __iomem *base,
struct msix_entry *entries, int nvec)
{
int ret;
- u16 control;
- void __iomem *base;
/* Ensure MSI-X is disabled while it is set up */
msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
- pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
- /* Request & Map MSI-X table region */
- base = msix_map_region(dev, msix_table_size(control));
- if (!base)
- return -ENOMEM;
-
ret = msix_setup_entries(dev, base, entries, nvec);
if (ret)
return ret;
@@ -948,6 +940,8 @@ int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
{
int status, nr_entries;
int i, j;
+ void __iomem *base;
+ u16 control;
if (!entries || !dev->msix_cap || dev->current_state != PCI_D0)
return -EINVAL;
@@ -978,7 +972,14 @@ int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
return -EINVAL;
}
- status = msix_capability_init(dev, entries, nvec);
+
+ /* Request & Map MSI-X table region */
+ pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
+ base = msix_map_region(dev, msix_table_size(control));
+ if (!base)
+ return -ENOMEM;
+
+ status = msix_capability_init(dev, base, entries, nvec);
return status;
}
EXPORT_SYMBOL(pci_enable_msix);
Move MSIX table address mapping work to PCI MSIX layer. Some Non-PCI MSI device will do their address mapping work before enable MSIX capability or their MSIX table address is within device address block. So Move address mapping stuff out of the generic MSIX core. This is prepartion for generic MSI drvier. Suggested-by: Yun Wu <wuyun.wu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> --- drivers/pci/msi.c | 25 +++++++++++++------------ 1 files changed, 13 insertions(+), 12 deletions(-)