From patchwork Sat Jul 26 03:08:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 4626581 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 83CA4C0338 for ; Sat, 26 Jul 2014 02:49:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A56D92020F for ; Sat, 26 Jul 2014 02:49:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C13D0201F4 for ; Sat, 26 Jul 2014 02:49:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XAs0K-0002yU-Jr; Sat, 26 Jul 2014 02:46:36 +0000 Received: from [119.145.14.64] (helo=szxga01-in.huawei.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XArzZ-0001Hu-Kb for linux-arm-kernel@lists.infradead.org; Sat, 26 Jul 2014 02:45:52 +0000 Received: from 172.24.2.119 (EHLO szxeml419-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BZG09042; Sat, 26 Jul 2014 10:43:48 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml419-hub.china.huawei.com (10.82.67.158) with Microsoft SMTP Server id 14.3.158.1; Sat, 26 Jul 2014 10:43:35 +0800 From: Yijing Wang To: Subject: [RFC PATCH 08/11] PCI/MSI: Introduce new struct msi_irqs and struct msi_ops Date: Sat, 26 Jul 2014 11:08:45 +0800 Message-ID: <1406344128-27055-9-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1406344128-27055-1-git-send-email-wangyijing@huawei.com> References: <1406344128-27055-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140725_194550_686927_FA220637 X-CRM114-Status: GOOD ( 10.64 ) X-Spam-Score: 0.6 (/) Cc: linux-arch@vger.kernel.org, Russell King , Paul.Mundt@huawei.com, Marc Zyngier , linux-pci@vger.kernel.org, "James E.J. Bottomley" , virtualization@lists.linux-foundation.org, Xinwei Hu , Yijing Wang , Hanjun Guo , Bjorn Helgaas , Wuyun , arnab.basu@freescale.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently, MSI driver is bonding with PCI everywhere. Now introduce a new struct msi_irqs to manage all MSI related informations in a MSI support device. In addition, we introduce struct msi_ops to hook all device specific MSI operations. Then MSI driver can be decoupled with PCI. Signed-off-by: Yijing Wang --- include/linux/msi.h | 30 +++++++++++++++++++++++++++++- include/linux/pci.h | 7 +------ 2 files changed, 30 insertions(+), 7 deletions(-) diff --git a/include/linux/msi.h b/include/linux/msi.h index 3ad8416..5a672d3 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -10,6 +10,34 @@ struct msi_msg { u32 data; /* 16 bits of msi message data */ }; +struct msi_ops; + +struct msi_irqs { + u8 msi_enabled:1; + u8 msix_enabled:1; + int node; + struct list_head msi_list; + void *data; + struct msi_ops *ops; +}; + +struct msix_entry { + u32 vector; /* kernel uses to write allocated vector */ + u16 entry; /* driver uses to specify entry, OS writes */ +}; + +struct msi_ops { + void (*msi_set_enable)(struct msi_irqs *msi, int enable, int type); + struct msi_desc *(*msi_setup_entry)(struct msi_irqs *msi); + int (*msix_setup_entries)(struct msi_irqs *msi, void __iomem *base, + struct msix_entry *entries, int nvec); + u32 (*msi_mask_irq)(struct msi_desc *desc, u32 mask, u32 flag); + u32 (*msix_mask_irq)(struct msi_desc *desc, u32 flag); + void (*msi_read_message)(struct msi_desc *desc, struct msi_msg *msg); + void (*msi_write_message)(struct msi_desc *desc, struct msi_msg *msg); + void (*msi_set_intx)(struct msi_irqs *msi, int enable); +}; + /* Helper functions */ struct irq_data; struct msi_desc; @@ -42,7 +70,7 @@ struct msi_desc { void __iomem *mask_base; u8 mask_pos; }; - struct pci_dev *dev; + struct msi_irqs *msi; /* Last set MSI message */ struct msi_msg msg; diff --git a/include/linux/pci.h b/include/linux/pci.h index c6c01ae..c7bca1c 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -32,8 +32,8 @@ #include #include - #include + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded @@ -1182,11 +1182,6 @@ enum pci_dma_burst_strategy { strategy_parameter byte boundaries */ }; -struct msix_entry { - u32 vector; /* kernel uses to write allocated vector */ - u16 entry; /* driver uses to specify entry, OS writes */ -}; - #ifdef CONFIG_PCI_MSI int pci_msi_vec_count(struct pci_dev *dev);