| Message ID | 1406555876-11989-9-git-send-email-haojian.zhuang@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Jul 28, 2014 at 09:57:52PM +0800, Haojian Zhuang wrote: > Append multi_v7_lpae_config. In this default configuration, > CONFIG_ARCH_MULTI_V6 is disabled. CONFIG_ARM_LPAE is enabled. NACK. This is the nth time I have had to nack this patch. You are enabling platforms here that don't have LPAE. Don't do that. It's trivial to create a LPAE version of multi_v7 defconfig locally. -Olof
On 29 July 2014 12:05, Olof Johansson <olof@lixom.net> wrote: > On Mon, Jul 28, 2014 at 09:57:52PM +0800, Haojian Zhuang wrote: >> Append multi_v7_lpae_config. In this default configuration, >> CONFIG_ARCH_MULTI_V6 is disabled. CONFIG_ARM_LPAE is enabled. > > NACK. This is the nth time I have had to nack this patch. > > You are enabling platforms here that don't have LPAE. Don't do that. > > It's trivial to create a LPAE version of multi_v7 defconfig locally. > > > -Olof I tried to remove those SoCs that can't support LPAE. But I don't know every platform in details. How about that I only enable HIP04 in multi_v7_lpae_defconfig. If you think any platform could be added, please help to list it. Then I could append them into the multi_v7_lpae_defconfig. Regards Haojian
On Tue, Jul 29, 2014 at 3:43 AM, Haojian Zhuang <haojian.zhuang@linaro.org> wrote: > On 29 July 2014 12:05, Olof Johansson <olof@lixom.net> wrote: >> On Mon, Jul 28, 2014 at 09:57:52PM +0800, Haojian Zhuang wrote: >>> Append multi_v7_lpae_config. In this default configuration, >>> CONFIG_ARCH_MULTI_V6 is disabled. CONFIG_ARM_LPAE is enabled. >> >> NACK. This is the nth time I have had to nack this patch. >> >> You are enabling platforms here that don't have LPAE. Don't do that. >> >> It's trivial to create a LPAE version of multi_v7 defconfig locally. >> >> >> -Olof > > I tried to remove those SoCs that can't support LPAE. But I don't know > every platform in details. > > How about that I only enable HIP04 in multi_v7_lpae_defconfig. If you > think any platform could be added, please help to list it. Then I > could append them into the multi_v7_lpae_defconfig. I really don't like having to repeat this over and over: Just add LPAE to a multi_v7_defconfig build when you need to turn it on. The alternative is to do this right from the beginning, and move multi_v7 over to be a v6_v7 defconfig, and also have an lpae+kvm defconfig for A7/12/15/17 (and mvebu/krait) platforms. But there's been no need for that yet since all platforms to date can boot without LPAE just fine -- in fact most of them don't actually need it since nearly all of them have less memory and for the few of them that do you just turn on LPAE manually like I suggested. -Olof
On 31 July 2014 09:01, Olof Johansson <olof@lixom.net> wrote: > On Tue, Jul 29, 2014 at 3:43 AM, Haojian Zhuang > <haojian.zhuang@linaro.org> wrote: >> On 29 July 2014 12:05, Olof Johansson <olof@lixom.net> wrote: >>> On Mon, Jul 28, 2014 at 09:57:52PM +0800, Haojian Zhuang wrote: >>>> Append multi_v7_lpae_config. In this default configuration, >>>> CONFIG_ARCH_MULTI_V6 is disabled. CONFIG_ARM_LPAE is enabled. >>> >>> NACK. This is the nth time I have had to nack this patch. >>> >>> You are enabling platforms here that don't have LPAE. Don't do that. >>> >>> It's trivial to create a LPAE version of multi_v7 defconfig locally. >>> >>> >>> -Olof >> >> I tried to remove those SoCs that can't support LPAE. But I don't know >> every platform in details. >> >> How about that I only enable HIP04 in multi_v7_lpae_defconfig. If you >> think any platform could be added, please help to list it. Then I >> could append them into the multi_v7_lpae_defconfig. > > I really don't like having to repeat this over and over: Just add LPAE > to a multi_v7_defconfig build when you need to turn it on. > > The alternative is to do this right from the beginning, and move > multi_v7 over to be a v6_v7 defconfig, and also have an lpae+kvm > defconfig for A7/12/15/17 (and mvebu/krait) platforms. But there's > been no need for that yet since all platforms to date can boot without > LPAE just fine -- in fact most of them don't actually need it since > nearly all of them have less memory and for the few of them that do > you just turn on LPAE manually like I suggested. > > > -Olof I can drop both hip04_defconfig & multi_v7_lpae_defconfig. But the problem is that 16GB memory is used in hip04 platform. 64bit memory address is also used in hip04 dts file. So I can't boot kernel without LPAE configuration. If I integrate ARCH_HIP04 & LPAE into hi3xxx_defconfig, both ARCH_HI3XXX & ARCH_X5HD2 don't support LPAE. Regards Haojian
On Wed, Jul 30, 2014 at 7:24 PM, Haojian Zhuang <haojian.zhuang@linaro.org> wrote: > On 31 July 2014 09:01, Olof Johansson <olof@lixom.net> wrote: >> On Tue, Jul 29, 2014 at 3:43 AM, Haojian Zhuang >> <haojian.zhuang@linaro.org> wrote: >>> On 29 July 2014 12:05, Olof Johansson <olof@lixom.net> wrote: >>>> On Mon, Jul 28, 2014 at 09:57:52PM +0800, Haojian Zhuang wrote: >>>>> Append multi_v7_lpae_config. In this default configuration, >>>>> CONFIG_ARCH_MULTI_V6 is disabled. CONFIG_ARM_LPAE is enabled. >>>> >>>> NACK. This is the nth time I have had to nack this patch. >>>> >>>> You are enabling platforms here that don't have LPAE. Don't do that. >>>> >>>> It's trivial to create a LPAE version of multi_v7 defconfig locally. >>>> >>>> >>>> -Olof >>> >>> I tried to remove those SoCs that can't support LPAE. But I don't know >>> every platform in details. >>> >>> How about that I only enable HIP04 in multi_v7_lpae_defconfig. If you >>> think any platform could be added, please help to list it. Then I >>> could append them into the multi_v7_lpae_defconfig. >> >> I really don't like having to repeat this over and over: Just add LPAE >> to a multi_v7_defconfig build when you need to turn it on. >> >> The alternative is to do this right from the beginning, and move >> multi_v7 over to be a v6_v7 defconfig, and also have an lpae+kvm >> defconfig for A7/12/15/17 (and mvebu/krait) platforms. But there's >> been no need for that yet since all platforms to date can boot without >> LPAE just fine -- in fact most of them don't actually need it since >> nearly all of them have less memory and for the few of them that do >> you just turn on LPAE manually like I suggested. >> >> >> -Olof > > I can drop both hip04_defconfig & multi_v7_lpae_defconfig. But the > problem is that 16GB memory is used in hip04 platform. 64bit memory > address is also used in hip04 dts file. So I can't boot kernel without > LPAE configuration. > > If I integrate ARCH_HIP04 & LPAE into hi3xxx_defconfig, both > ARCH_HI3XXX & ARCH_X5HD2 don't support LPAE. There is memory at 0x10000000-0xd0000000 and all I/O is below 4GB. You should be able to boot just fine without LPAE, but you won't see all memory available. -Olof
On 31 July 2014 11:55, Olof Johansson <olof@lixom.net> wrote: > On Wed, Jul 30, 2014 at 7:24 PM, Haojian Zhuang > <haojian.zhuang@linaro.org> wrote: >> On 31 July 2014 09:01, Olof Johansson <olof@lixom.net> wrote: >>> On Tue, Jul 29, 2014 at 3:43 AM, Haojian Zhuang >>> <haojian.zhuang@linaro.org> wrote: >>>> On 29 July 2014 12:05, Olof Johansson <olof@lixom.net> wrote: >>>>> On Mon, Jul 28, 2014 at 09:57:52PM +0800, Haojian Zhuang wrote: >>>>>> Append multi_v7_lpae_config. In this default configuration, >>>>>> CONFIG_ARCH_MULTI_V6 is disabled. CONFIG_ARM_LPAE is enabled. >>>>> >>>>> NACK. This is the nth time I have had to nack this patch. >>>>> >>>>> You are enabling platforms here that don't have LPAE. Don't do that. >>>>> >>>>> It's trivial to create a LPAE version of multi_v7 defconfig locally. >>>>> >>>>> >>>>> -Olof >>>> >>>> I tried to remove those SoCs that can't support LPAE. But I don't know >>>> every platform in details. >>>> >>>> How about that I only enable HIP04 in multi_v7_lpae_defconfig. If you >>>> think any platform could be added, please help to list it. Then I >>>> could append them into the multi_v7_lpae_defconfig. >>> >>> I really don't like having to repeat this over and over: Just add LPAE >>> to a multi_v7_defconfig build when you need to turn it on. >>> >>> The alternative is to do this right from the beginning, and move >>> multi_v7 over to be a v6_v7 defconfig, and also have an lpae+kvm >>> defconfig for A7/12/15/17 (and mvebu/krait) platforms. But there's >>> been no need for that yet since all platforms to date can boot without >>> LPAE just fine -- in fact most of them don't actually need it since >>> nearly all of them have less memory and for the few of them that do >>> you just turn on LPAE manually like I suggested. >>> >>> >>> -Olof >> >> I can drop both hip04_defconfig & multi_v7_lpae_defconfig. But the >> problem is that 16GB memory is used in hip04 platform. 64bit memory >> address is also used in hip04 dts file. So I can't boot kernel without >> LPAE configuration. >> >> If I integrate ARCH_HIP04 & LPAE into hi3xxx_defconfig, both >> ARCH_HI3XXX & ARCH_X5HD2 don't support LPAE. > > There is memory at 0x10000000-0xd0000000 and all I/O is below 4GB. You > should be able to boot just fine without LPAE, but you won't see all > memory available. > Maybe I didn't express this well. Let's check the memory layout in hip04. <0x00000000-10000000, 0x00000000-c0000000> & <0x00000004-0xc0000000, 0x00000003-40000000> are two memory regions. These memory address is 64-bit. When ARM_LPAE is disabled, memblock_add() parses memory base address & size with 32-bit. Since ARCH_PHYS_ADDR_T_64BIT is highly depend on ARM_LPAE. Then these two memory regions become <0x10000000, 0xc0000000> & <0xc0000000, 0xffffffff>. Lots of IO space are in <0xe0000000, 0xefffffff>. So memory space conflicts when ARM_LPAE is disabled. Kernel panic will come since it believes IO space is memory. Only two solutions are available in below. 1. Use hip04_defconfig to declare ARM_LPAE. 2. Use hi3xxx_defconfig, and only declare 2.9GB memory in DTS file without ARM_LPAE. I think solution #1 is better. What's your opinion? Best Regards Haojian
On Thursday 31 July 2014, Haojian Zhuang wrote: > Maybe I didn't express this well. Let's check the memory layout in hip04. > > <0x00000000-10000000, 0x00000000-c0000000> & <0x00000004-0xc0000000, > 0x00000003-40000000> are two memory regions. > > These memory address is 64-bit. When ARM_LPAE is disabled, > memblock_add() parses memory base address & size with 32-bit. Since > ARCH_PHYS_ADDR_T_64BIT is highly depend on ARM_LPAE. > > Then these two memory regions become <0x10000000, 0xc0000000> & > <0xc0000000, 0xffffffff>. Lots of IO space are in <0xe0000000, > 0xefffffff>. So memory space conflicts when ARM_LPAE is disabled. > Kernel panic will come since it believes IO space is memory. > > Only two solutions are available in below. > 1. Use hip04_defconfig to declare ARM_LPAE. > 2. Use hi3xxx_defconfig, and only declare 2.9GB memory in DTS file > without ARM_LPAE. > > I think solution #1 is better. What's your opinion? > I think it's a bug in the DT parsing code if incorrect memory regions get added. It's supposed to parse the memory nodes using "long enough" (u64 or arbitrary-length) data types and then skip every range that doesn't fit into phys_addr_t. Arnd
On 31 July 2014 22:41, Arnd Bergmann <arnd@arndb.de> wrote: > On Thursday 31 July 2014, Haojian Zhuang wrote: >> Maybe I didn't express this well. Let's check the memory layout in hip04. >> >> <0x00000000-10000000, 0x00000000-c0000000> & <0x00000004-0xc0000000, >> 0x00000003-40000000> are two memory regions. >> >> These memory address is 64-bit. When ARM_LPAE is disabled, >> memblock_add() parses memory base address & size with 32-bit. Since >> ARCH_PHYS_ADDR_T_64BIT is highly depend on ARM_LPAE. >> >> Then these two memory regions become <0x10000000, 0xc0000000> & >> <0xc0000000, 0xffffffff>. Lots of IO space are in <0xe0000000, >> 0xefffffff>. So memory space conflicts when ARM_LPAE is disabled. >> Kernel panic will come since it believes IO space is memory. >> >> Only two solutions are available in below. >> 1. Use hip04_defconfig to declare ARM_LPAE. >> 2. Use hi3xxx_defconfig, and only declare 2.9GB memory in DTS file >> without ARM_LPAE. >> >> I think solution #1 is better. What's your opinion? >> > > I think it's a bug in the DT parsing code if incorrect memory > regions get added. It's supposed to parse the memory nodes using > "long enough" (u64 or arbitrary-length) data types and then > skip every range that doesn't fit into phys_addr_t. > > Arnd OK. I'll check them before invoking memblock_add(). Regards Haojian
diff --git a/arch/arm/configs/multi_v7_lpae_defconfig b/arch/arm/configs/multi_v7_lpae_defconfig new file mode 100644 index 0000000..891937b --- /dev/null +++ b/arch/arm/configs/multi_v7_lpae_defconfig @@ -0,0 +1,343 @@ +CONFIG_SYSVIPC=y +CONFIG_FHANDLE=y +CONFIG_IRQ_DOMAIN_DEBUG=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EMBEDDED=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ARCH_MULTI_V6 is not set +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARM_LPAE=y +CONFIG_ARCH_MVEBU=y +CONFIG_MACH_ARMADA_XP=y +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BCM_5301X=y +CONFIG_ARCH_BCM_MOBILE=y +CONFIG_GPIO_PCA953X=y +CONFIG_ARCH_HIGHBANK=y +CONFIG_ARCH_HISI=y +CONFIG_ARCH_HIP04=y +CONFIG_ARCH_KEYSTONE=y +CONFIG_ARCH_MXC=y +CONFIG_MACH_IMX51_DT=y +CONFIG_SOC_IMX53=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_VF610=y +CONFIG_ARCH_OMAP3=y +CONFIG_ARCH_OMAP4=y +CONFIG_SOC_OMAP5=y +CONFIG_SOC_AM33XX=y +CONFIG_SOC_DRA7XX=y +CONFIG_SOC_AM43XX=y +CONFIG_ARCH_QCOM=y +CONFIG_ARCH_MSM8X60=y +CONFIG_ARCH_MSM8960=y +CONFIG_ARCH_MSM8974=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_PLAT_SPEAR=y +CONFIG_ARCH_SPEAR13XX=y +CONFIG_MACH_SPEAR1310=y +CONFIG_MACH_SPEAR1340=y +CONFIG_ARCH_STI=y +CONFIG_ARCH_SUNXI=y +CONFIG_ARCH_SIRF=y +CONFIG_ARCH_TEGRA=y +CONFIG_ARCH_TEGRA_2x_SOC=y +CONFIG_ARCH_TEGRA_3x_SOC=y +CONFIG_ARCH_TEGRA_114_SOC=y +CONFIG_ARCH_TEGRA_124_SOC=y +CONFIG_TEGRA_EMC_SCALING_ENABLE=y +CONFIG_ARCH_U8500=y +CONFIG_MACH_HREFV60=y +CONFIG_MACH_SNOWBALL=y +CONFIG_MACH_UX500_DT=y +CONFIG_ARCH_VEXPRESS=y +CONFIG_ARCH_VEXPRESS_CA9X4=y +CONFIG_ARCH_VIRT=y +CONFIG_ARCH_WM8850=y +CONFIG_ARCH_ZYNQ=y +CONFIG_NEON=y +CONFIG_TRUSTED_FOUNDATIONS=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MVEBU=y +CONFIG_PCI_TEGRA=y +CONFIG_SMP=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_CMA=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_KEXEC=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_IDLE=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_CFG80211=m +CONFIG_MAC80211=m +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_OMAP_OCP2SCP=y +CONFIG_MTD=y +CONFIG_MTD_M25P80=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_ICS932S401=y +CONFIG_APDS9802ALS=y +CONFIG_ISL29003=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_HIGHBANK=y +CONFIG_SATA_MV=y +CONFIG_NETDEVICES=y +CONFIG_SUN4I_EMAC=y +CONFIG_NET_CALXEDA_XGMAC=y +CONFIG_MV643XX_ETH=y +CONFIG_MVNETA=y +CONFIG_KS8851=y +CONFIG_R8169=y +CONFIG_SMSC911X=y +CONFIG_STMMAC_ETH=y +CONFIG_TI_CPSW=y +CONFIG_AT803X_PHY=y +CONFIG_MARVELL_PHY=y +CONFIG_ICPLUS_PHY=y +CONFIG_USB_PEGASUS=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_BRCMFMAC=m +CONFIG_RT2X00=m +CONFIG_RT2800USB=m +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_TEGRA=y +CONFIG_KEYBOARD_SPEAR=y +CONFIG_KEYBOARD_CROS_EC=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MPU3050=y +CONFIG_SERIO_AMBAKMI=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_SIRFSOC=y +CONFIG_SERIAL_SIRFSOC_CONSOLE=y +CONFIG_SERIAL_TEGRA=y +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y +CONFIG_SERIAL_VT8500=y +CONFIG_SERIAL_VT8500_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_OMAP=y +CONFIG_SERIAL_OMAP_CONSOLE=y +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_SERIAL_ST_ASC=y +CONFIG_SERIAL_ST_ASC_CONSOLE=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_MUX_PINCTRL=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_MV64XXX=y +CONFIG_I2C_SIRF=y +CONFIG_I2C_TEGRA=y +CONFIG_SPI=y +CONFIG_SPI_OMAP24XX=y +CONFIG_SPI_ORION=y +CONFIG_SPI_PL022=y +CONFIG_SPI_SIRF=y +CONFIG_SPI_TEGRA114=y +CONFIG_SPI_TEGRA20_SFLASH=y +CONFIG_SPI_TEGRA20_SLINK=y +CONFIG_PINCTRL_AS3722=y +CONFIG_PINCTRL_PALMAS=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_TWL4030=y +CONFIG_GPIO_PALMAS=y +CONFIG_GPIO_TPS6586X=y +CONFIG_GPIO_TPS65910=y +CONFIG_BATTERY_SBS=y +CONFIG_CHARGER_TPS65090=y +CONFIG_POWER_RESET_AS3722=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_SENSORS_LM90=y +CONFIG_THERMAL=y +CONFIG_DOVE_THERMAL=y +CONFIG_ARMADA_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_ORION_WATCHDOG=y +CONFIG_MFD_AS3722=y +CONFIG_MFD_CROS_EC=y +CONFIG_MFD_CROS_EC_SPI=y +CONFIG_MFD_MAX8907=y +CONFIG_MFD_PALMAS=y +CONFIG_MFD_TPS65090=y +CONFIG_MFD_TPS6586X=y +CONFIG_MFD_TPS65910=y +CONFIG_REGULATOR_VIRTUAL_CONSUMER=y +CONFIG_REGULATOR_AB8500=y +CONFIG_REGULATOR_AS3722=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX8907=y +CONFIG_REGULATOR_PALMAS=y +CONFIG_REGULATOR_TPS51632=y +CONFIG_REGULATOR_TPS62360=y +CONFIG_REGULATOR_TPS65090=y +CONFIG_REGULATOR_TPS6586X=y +CONFIG_REGULATOR_TPS65910=y +CONFIG_REGULATOR_TWL4030=y +CONFIG_REGULATOR_VEXPRESS=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_GSPCA=y +CONFIG_DRM=y +CONFIG_DRM_TEGRA=y +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_FB_ARMCLCD=y +CONFIG_FB_WM8505=y +CONFIG_FB_SIMPLE=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_TEGRA=y +CONFIG_SND_SOC_TEGRA_RT5640=y +CONFIG_SND_SOC_TEGRA_WM8753=y +CONFIG_SND_SOC_TEGRA_WM8903=y +CONFIG_SND_SOC_TEGRA_TRIMSLICE=y +CONFIG_SND_SOC_TEGRA_ALC5632=y +CONFIG_SND_SOC_TEGRA_MAX98090=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_AB8500_USB=y +CONFIG_OMAP_USB3=y +CONFIG_SAMSUNG_USB2PHY=y +CONFIG_SAMSUNG_USB3PHY=y +CONFIG_USB_GPIO_VBUS=y +CONFIG_USB_ISP1301=y +CONFIG_USB_MXS_PHY=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MMC_SDHCI_TEGRA=y +CONFIG_MMC_SDHCI_DOVE=y +CONFIG_MMC_SDHCI_SPEAR=y +CONFIG_MMC_SDHCI_BCM_KONA=y +CONFIG_MMC_OMAP=y +CONFIG_MMC_OMAP_HS=y +CONFIG_MMC_MVSDIO=y +CONFIG_EDAC=y +CONFIG_EDAC_MM_EDAC=y +CONFIG_EDAC_HIGHBANK_MC=y +CONFIG_EDAC_HIGHBANK_L2=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_AS3722=y +CONFIG_RTC_DRV_MAX8907=y +CONFIG_RTC_DRV_PALMAS=y +CONFIG_RTC_DRV_TWL4030=y +CONFIG_RTC_DRV_TPS6586X=y +CONFIG_RTC_DRV_TPS65910=y +CONFIG_RTC_DRV_EM3027=y +CONFIG_RTC_DRV_PL031=y +CONFIG_RTC_DRV_VT8500=y +CONFIG_RTC_DRV_MV=y +CONFIG_RTC_DRV_TEGRA=y +CONFIG_DMADEVICES=y +CONFIG_DW_DMAC=y +CONFIG_MV_XOR=y +CONFIG_TEGRA20_APB_DMA=y +CONFIG_STE_DMA40=y +CONFIG_SIRF_DMA=y +CONFIG_TI_EDMA=y +CONFIG_PL330_DMA=y +CONFIG_IMX_SDMA=y +CONFIG_IMX_DMA=y +CONFIG_MXS_DMA=y +CONFIG_DMA_OMAP=y +CONFIG_STAGING=y +CONFIG_SENSORS_ISL29018=y +CONFIG_SENSORS_ISL29028=y +CONFIG_MFD_NVEC=y +CONFIG_KEYBOARD_NVEC=y +CONFIG_SERIO_NVEC_PS2=y +CONFIG_NVEC_POWER=y +CONFIG_COMMON_CLK_QCOM=y +CONFIG_MSM_GCC_8660=y +CONFIG_MSM_MMCC_8960=y +CONFIG_MSM_MMCC_8974=y +CONFIG_TEGRA_IOMMU_GART=y +CONFIG_TEGRA_IOMMU_SMMU=y +CONFIG_MEMORY=y +CONFIG_IIO=y +CONFIG_AK8975=y +CONFIG_PWM=y +CONFIG_PWM_TEGRA=y +CONFIG_PWM_VT8500=y +CONFIG_OMAP_USB2=y +CONFIG_EXT4_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_CRYPTO_DEV_TEGRA_AES=y
Append multi_v7_lpae_config. In this default configuration, CONFIG_ARCH_MULTI_V6 is disabled. CONFIG_ARM_LPAE is enabled. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> --- arch/arm/configs/multi_v7_lpae_defconfig | 343 +++++++++++++++++++++++++++++++ 1 file changed, 343 insertions(+) create mode 100644 arch/arm/configs/multi_v7_lpae_defconfig