From patchwork Wed Jul 30 08:07:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thomas Abraham X-Patchwork-Id: 4646411 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D3C1D9F32F for ; Wed, 30 Jul 2014 08:14:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BC57B20123 for ; Wed, 30 Jul 2014 08:14:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B34C12011E for ; Wed, 30 Jul 2014 08:14:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCOzy-0005iW-M9; Wed, 30 Jul 2014 08:12:34 +0000 Received: from mailout2.samsung.com ([203.254.224.25]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCOzq-0005L6-7u for linux-arm-kernel@lists.infradead.org; Wed, 30 Jul 2014 08:12:27 +0000 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N9I006DOMRH5U80@mailout2.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 30 Jul 2014 17:11:41 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id E2.80.15745.DB8A8D35; Wed, 30 Jul 2014 17:11:41 +0900 (KST) X-AuditID: cbfee691-b7f306d000003d81-9e-53d8a8bde5fd Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id BC.BF.04943.DB8A8D35; Wed, 30 Jul 2014 17:11:41 +0900 (KST) Received: from chromebld-server.sisodomain.com ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N9I0008ZMPZWZB0@mmp2.samsung.com>; Wed, 30 Jul 2014 17:11:41 +0900 (KST) From: Thomas Abraham To: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v9 3/6] ARM: dts: Exynos: add CPU OPP and regulator supply property Date: Wed, 30 Jul 2014 13:37:40 +0530 Message-id: <1406707663-16656-4-git-send-email-thomas.ab@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1406707663-16656-1-git-send-email-thomas.ab@samsung.com> References: <1406707663-16656-1-git-send-email-thomas.ab@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsWyRsSkTnfvihvBBj+Oi1s0byq2uP7lOavF 2WUH2Sz+P3rNanH0d4FF74KrbBZvHm5mtNj0+BqrxefeI4wWM87vY7J4OuEim8XJP72MFutn vGax6FjGaLHxq4cDv8fshossHn+fX2fxuHNtD5vH5iX1Hn1bVjF6bL82j9lj8+lqj8+b5AI4 orhsUlJzMstSi/TtErgyui5NZS9YYl6xfNkC1gbG91pdjJwcEgImEv1H+hghbDGJC/fWs3Ux cnEICSxllFj8dBobTNH97WeZIBLTGSU+Xr7EDpIQEpjAJPHnWxWIzSagI3HjzW+wSSICThLf jlwDa2AWmMAs8b7/AxNIQlggVOJ+229mEJtFQFVi8tPbLCA2r4CrRPuDl0BxDqBtChJzJtmA hDkF3CReTDrBArHLVeLNtk5mkJkSAi/ZJU73fmKBmCMg8W3yIRaIXlmJTQeYIY6WlDi44gbL BEbhBYwMqxhFUwuSC4qT0otM9YoTc4tL89L1kvNzNzECI+n0v2cTdzDeP2B9iDEZaNxEZinR 5HxgJOaVxBsamxlZmJqYGhuZW5qRJqwkzpv+KClISCA9sSQ1OzW1ILUovqg0J7X4ECMTB6dU AyNzYfjWhypHrbrXJ8Uf/nX25xe1WduqeG+qLrhjOo9l2xR+K/aVtkFWi5POrNOomOZU+iP/ oW20OM/8ui+LtBrKQr5Nu1y/NP1c1TUz4RPnJpetOL3eOeERw9ksqZncLQyvL38WUOSPXGOi lTKp3mjzpkifYlmj2KCg96GVfqmvHnO7/9jXO12JpTgj0VCLuag4EQB00oc7ugIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGIsWRmVeSWpSXmKPExsVy+t9jQd29K24EG0w5wWvRvKnY4vqX56wW Z5cdZLP4/+g1q8XR3wUWvQuuslm8ebiZ0WLT42usFp97jzBazDi/j8ni6YSLbBYn//QyWqyf 8ZrFomMZo8XGrx4O/B6zGy6yePx9fp3F4861PWwem5fUe/RtWcXosf3aPGaPzaerPT5vkgvg iGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLxCdB1y8wBOlxJ oSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEaSFjDmNF1aSp7wRLziuXLFrA2ML7X 6mLk5JAQMJG4v/0sE4QtJnHh3nq2LkYuDiGB6YwSHy9fYgdJCAlMYJL4860KxGYT0JG48eY3 I4gtIuAk8e3INSaQBmaBCcwS7/s/gE0SFgiVuN/2mxnEZhFQlZj89DYLiM0r4CrR/uAlUJwD aJuCxJxJNiBhTgE3iReTTrBA7HKVeLOtk3kCI+8CRoZVjKKpBckFxUnpuYZ6xYm5xaV56XrJ +bmbGMFx+kxqB+PKBotDjAIcjEo8vDP+Xw8WYk0sK67MPcQowcGsJMJrOudGsBBvSmJlVWpR fnxRaU5q8SFGU6CjJjJLiSbnA1NIXkm8obGJuamxqaWJhYmZpZI474FW60AhgfTEktTs1NSC 1CKYPiYOTqkGxjMeIatvvfE/c83KZt+ZM6EPWNls/mX/Yjv8i8varnuiwlGTeMZVd68GMnpF tUmWTlT3nPdFanLz/0VHPir8+2sm8FvpzpEvnxPMt/6r1+R+Z9el7/kgZ/qt1Zet95Y3F/s3 mFXeKpqpzLSJ93f0qht1L1j9hfs4b3JvOX/lR/715IRdud2FaUosxRmJhlrMRcWJAPSwFoXp AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140730_011226_437424_08497265 X-CRM114-Status: UNSURE ( 9.91 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -5.7 (-----) Cc: l.majewski@samsung.com, kgene.kim@samsung.com, mturquette@linaro.org, heiko@sntech.de, Sachin Kamat , viresh.kumar@linaro.org, t.figa@samsung.com, Doug Anderson , Andreas Faerber , cw00.choi@samsung.com, linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, Javier Martinez Canillas X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For Exynos 4210/5250/5420 based platforms, add CPU operating points and CPU regulator supply properties for migrating from Exynos specific cpufreq driver to using generic cpufreq drivers. Cc: Kukjin Kim Cc: Doug Anderson Cc: Javier Martinez Canillas Cc: Andreas Faerber Cc: Sachin Kamat Signed-off-by: Thomas Abraham Reviewed-by: Andreas Färber Tested-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos4210-origen.dts | 4 +++ arch/arm/boot/dts/exynos4210-trats.dts | 4 +++ arch/arm/boot/dts/exynos4210-universal_c210.dts | 4 +++ arch/arm/boot/dts/exynos4210.dtsi | 14 ++++++++- arch/arm/boot/dts/exynos5250-arndale.dts | 4 +++ arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 +++ arch/arm/boot/dts/exynos5250-snow.dts | 4 +++ arch/arm/boot/dts/exynos5250.dtsi | 25 ++++++++++++++- arch/arm/boot/dts/exynos5420.dtsi | 38 +++++++++++++++++++++++ 9 files changed, 99 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index f767c42..887dded 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -334,3 +334,7 @@ }; }; }; + +&cpu0 { + cpu0-supply = <&buck1_reg>; +}; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index f516da9..66119dd 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -446,3 +446,7 @@ }; }; }; + +&cpu0 { + cpu0-supply = <&varm_breg>; +}; diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index d50eb3a..bf0a39c 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -492,3 +492,7 @@ &mdma1 { reg = <0x12840000 0x1000>; }; + +&cpu0 { + cpu0-supply = <&vdd_arm_reg>; +}; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index bcc9e63..69bac07 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -35,10 +35,22 @@ #address-cells = <1>; #size-cells = <0>; - cpu@900 { + cpu0: cpu@900 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0x900>; + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu"; + clock-latency = <160000>; + + operating-points = < + 1200000 1250000 + 1000000 1150000 + 800000 1075000 + 500000 975000 + 400000 975000 + 200000 950000 + >; }; cpu@901 { diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index d0de1f5..3b12a97 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -575,3 +575,7 @@ usb-phy = <&usb2_phy>; }; }; + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index b4b35ad..f07e834 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -414,3 +414,7 @@ }; }; }; + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index f2b8c41..91acca7 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -509,4 +509,8 @@ }; }; +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; + #include "cros-ec-keyboard.dtsi" diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 492e1ef..97b282c 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -58,11 +58,34 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; clock-frequency = <1700000000>; + + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu"; + clock-latency = <140000>; + + operating-points = < + 1700000 1300000 + 1600000 1250000 + 1500000 1225000 + 1400000 1200000 + 1300000 1150000 + 1200000 1125000 + 1100000 1100000 + 1000000 1075000 + 900000 1050000 + 800000 1025000 + 700000 1012500 + 600000 1000000 + 500000 975000 + 400000 950000 + 300000 937500 + 200000 925000 + >; }; cpu@1 { device_type = "cpu"; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index cb2b70e..3154b4c 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -59,8 +59,26 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu-cluster.0"; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; + + operating-points = < + 1800000 1250000 + 1700000 1212500 + 1600000 1175000 + 1500000 1137500 + 1400000 1112500 + 1300000 1062500 + 1200000 1037500 + 1100000 1012500 + 1000000 987500 + 900000 962500 + 800000 937500 + 700000 912500 + >; }; cpu1: cpu@1 { @@ -69,6 +87,7 @@ reg = <0x1>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; }; cpu2: cpu@2 { @@ -77,6 +96,7 @@ reg = <0x2>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; }; cpu3: cpu@3 { @@ -85,14 +105,29 @@ reg = <0x3>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; }; cpu4: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x100>; + clocks = <&clock CLK_KFC_CLK>; + clock-names = "cpu-cluster.1"; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; + + operating-points = < + 1300000 1275000 + 1200000 1212500 + 1100000 1162500 + 1000000 1112500 + 900000 1062500 + 800000 1025000 + 700000 975000 + 600000 937500 + >; }; cpu5: cpu@101 { @@ -101,6 +136,7 @@ reg = <0x101>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; }; cpu6: cpu@102 { @@ -109,6 +145,7 @@ reg = <0x102>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; }; cpu7: cpu@103 { @@ -117,6 +154,7 @@ reg = <0x103>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; }; };