@@ -335,6 +335,30 @@
clock-output-names = "ir1";
};
+ i2s0_clk: clk@01c200b8 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod1-clk";
+ reg = <0x01c200b8 0x4>;
+ clocks = <&pll2 3>, <&pll2 2>, <&pll2 1>, <&pll2 0>;
+ clock-output-names = "i2s0";
+ };
+
+ ac97_clk: clk@01c200bc {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod1-clk";
+ reg = <0x01c200bc 0x4>;
+ clocks = <&pll2 3>, <&pll2 2>, <&pll2 1>, <&pll2 0>;
+ clock-output-names = "ac97";
+ };
+
+ spdif_clk: clk@01c200c0 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod1-clk";
+ reg = <0x01c200c0 0x4>;
+ clocks = <&pll2 3>, <&pll2 2>, <&pll2 1>, <&pll2 0>;
+ clock-output-names = "spdif";
+ };
+
usb_clk: clk@01c200cc {
#clock-cells = <1>;
#reset-cells = <1>;
@@ -352,6 +376,22 @@
clock-output-names = "spi3";
};
+ i2s1_clk: clk@01c200d8 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod1-clk";
+ reg = <0x01c200d8 0x4>;
+ clocks = <&pll2 3>, <&pll2 2>, <&pll2 1>, <&pll2 0>;
+ clock-output-names = "i2s1";
+ };
+
+ i2s2_clk: clk@01c200dc {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod1-clk";
+ reg = <0x01c200dc 0x4>;
+ clocks = <&pll2 3>, <&pll2 2>, <&pll2 1>, <&pll2 0>;
+ clock-output-names = "i2s2";
+ };
+
codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";