From patchwork Tue Aug 5 09:24:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 4676741 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6FCB19F373 for ; Tue, 5 Aug 2014 09:27:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A901220160 for ; Tue, 5 Aug 2014 09:27:33 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 12AEC20173 for ; Tue, 5 Aug 2014 09:27:32 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XEazi-00025Q-NG; Tue, 05 Aug 2014 09:25:22 +0000 Received: from mail-pd0-f175.google.com ([209.85.192.175]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XEazT-0000qF-Ke for linux-arm-kernel@lists.infradead.org; Tue, 05 Aug 2014 09:25:11 +0000 Received: by mail-pd0-f175.google.com with SMTP id r10so1021922pdi.20 for ; Tue, 05 Aug 2014 02:24:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KhzuyphJuUhw92SbfBn4c8vnS5Snp4Wc5Bss8+kNInc=; b=HYI7lpbdQTLttk4fWAjCe91uvMjZuGKVLP2cv7t+DJlj0qXdC/x1RDFrjGu7gKU9Fi lZe9cK1sFIMP+N8L8Yqwqd53pDtEllsqMegVcpDpTXz4Jx9J5IKyVRwm5JZ2SJoCozWB gxnb9XPsYZ+zotebTfQM40c/tEMrkS7VBazZFV6kO1WVxmX83P+m3Wozy904FUUREjA8 LhHbs/jw+tCxFlFsfk7uuZltCJYvc1xQQm+DlqTpnRwBPawS0CUSnFlLlGDAUO8kagVF nN0v97JT7PAneC6Y/L7qRRXkgmOpLk7eCwD8h3V09KdYEX3Kp7PDqd+eJ17oWaLEvshq QebQ== X-Gm-Message-State: ALoCoQl3kESQwDTNrU21dMTou1LndJZqHFL+ZQWokibSGmIvYwPuCp94omjm0GQvD/40+R81DglB X-Received: by 10.68.223.138 with SMTP id qu10mr2699133pbc.45.1407230684570; Tue, 05 Aug 2014 02:24:44 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id ho7sm4434486pad.9.2014.08.05.02.24.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 05 Aug 2014 02:24:43 -0700 (PDT) From: Anup Patel To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 2/6] ARM64: perf: Re-enable overflow interrupt from interrupt handler Date: Tue, 5 Aug 2014 14:54:11 +0530 Message-Id: <1407230655-28864-3-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1407230655-28864-1-git-send-email-anup.patel@linaro.org> References: <1407230655-28864-1-git-send-email-anup.patel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140805_022507_711184_60B28AF2 X-CRM114-Status: GOOD ( 10.59 ) X-Spam-Score: -1.4 (-) Cc: ian.campbell@citrix.com, kvm@vger.kernel.org, Anup Patel , marc.zyngier@arm.com, patches@apm.com, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org, christoffer.dall@linaro.org, pranavkumar@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A hypervisor will typically mask the overflow interrupt before forwarding it to Guest Linux hence we need to re-enable the overflow interrupt after clearing it in Guest Linux. Also, this re-enabling of overflow interrupt does not harm in non-virtualized scenarios. Signed-off-by: Pranavkumar Sawargaonkar Signed-off-by: Anup Patel --- arch/arm64/kernel/perf_event.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 47dfb8b..19fb140 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -1076,6 +1076,14 @@ static irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev) if (!armv8pmu_counter_has_overflowed(pmovsr, idx)) continue; + /* + * If we are running under a hypervisor such as KVM then + * hypervisor will mask the interrupt before forwarding + * it to Guest Linux hence re-enable interrupt for the + * overflowed counter. + */ + armv8pmu_enable_intens(idx); + hwc = &event->hw; armpmu_event_update(event, hwc, idx); perf_sample_data_init(&data, 0, hwc->last_period);