From patchwork Thu Aug 7 10:51:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 4690701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D81949F373 for ; Thu, 7 Aug 2014 10:56:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 154D7201DD for ; Thu, 7 Aug 2014 10:56:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 449FD201CE for ; Thu, 7 Aug 2014 10:56:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XFLM1-0003TR-Hs; Thu, 07 Aug 2014 10:55:29 +0000 Received: from mail-pa0-f50.google.com ([209.85.220.50]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XFLLd-0001J2-Vl for linux-arm-kernel@lists.infradead.org; Thu, 07 Aug 2014 10:55:06 +0000 Received: by mail-pa0-f50.google.com with SMTP id et14so5226295pad.37 for ; Thu, 07 Aug 2014 03:54:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=digz/t/3uleE0rUuMGlEjt45jM6AR1xqbVYkqWRD8fU=; b=X/EIQgMaJ4KJgB43ffgHrqJ6kMQsv0al7TbPshZZPd0yW8MSNvkS16WRSh2ycwhZin XIAcSF+eDAd6M4d1jaQpelUHpLI6O4bB9xg6bkQF8zrPUykH0FdZcmPBUJc250XNu6j4 YNAEUAEtgdnlXpPPDgHhgeu2z6HuaWx3yKHyNEiqPfQjXPNRySD57yKz9+VtGQDJYP8N j+fqiLaFvSzkrRlwplRJsauEWhQO3mUB+G4FesgZP08UfmFe8RaqWr6yj8Oi0EVJ35Hc +CX07wC9pVdSfd11IIiqwaikxVq1aAofPJVGG1kBsQC/LvFMSR2GvYMyiwVRYLXbDT1v I3Wg== X-Gm-Message-State: ALoCoQmoQfthQ7IncspThparcA5JHI3kaXYs4mCHkTtMreSX9y/kzD+PI6HWdB3vkS2InAYyhkDQ X-Received: by 10.68.137.67 with SMTP id qg3mr16643113pbb.113.1407408885188; Thu, 07 Aug 2014 03:54:45 -0700 (PDT) Received: from localhost.localdomain ([61.172.253.147]) by mx.google.com with ESMTPSA id k9sm5937741pdo.28.2014.08.07.03.54.39 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 Aug 2014 03:54:44 -0700 (PDT) From: Haojian Zhuang To: nicolas.pitre@linaro.org, arnd@arndb.de, olof@lixom.net, marc.zyngier@arm.com, jason@lakedaemon.net, linux-arm-kernel@lists.infradead.org, khilman@linaro.org, xuwei5@hisilicon.com Subject: [PATCH v17 9/9] of: fdt: fix memory address be truncated Date: Thu, 7 Aug 2014 18:51:35 +0800 Message-Id: <1407408695-19626-10-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1407408695-19626-1-git-send-email-haojian.zhuang@linaro.org> References: <1407408695-19626-1-git-send-email-haojian.zhuang@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140807_035506_090961_A16184F3 X-CRM114-Status: GOOD ( 11.81 ) X-Spam-Score: -0.7 (/) Cc: Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP early_init_dt_add_memory_arch() accepts base & size parameters as u64 type. memblock_add() accepts base & size parameters as phys_addr_t type. But phys_addr_t isn't equal to u64. In 32-bit system, phys_addr_t is 32-bit long. If 64-bit memory address is specified in DTS file, it'll be truncated into 32-bit address. So create two values to store base & size first as phys_addr_t type. Then compare them with u64 base & u64 size. If they don't match, discard them. Signed-off-by: Haojian Zhuang --- drivers/of/fdt.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index c4cddf0..10d5382 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -878,6 +878,8 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname, void __init __weak early_init_dt_add_memory_arch(u64 base, u64 size) { const u64 phys_offset = __pa(PAGE_OFFSET); + phys_addr_t mbase, msize; + base &= PAGE_MASK; size &= PAGE_MASK; if (base + size < phys_offset) { @@ -885,6 +887,14 @@ void __init __weak early_init_dt_add_memory_arch(u64 base, u64 size) base, base + size); return; } + /* phys_addr_t may not be equal to u64 */ + mbase = base; + msize = size; + if ((mbase != base) || (msize != size)) { + pr_warning("Ignoring memory block 0x%llx - 0x%llx\n", + base, base + size); + return; + } if (base < phys_offset) { pr_warning("Ignoring memory range 0x%llx - 0x%llx\n", base, phys_offset);