From patchwork Mon Aug 11 12:14:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 4707021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id ACBEAC0338 for ; Mon, 11 Aug 2014 12:18:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E65DC20109 for ; Mon, 11 Aug 2014 12:18:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A94520108 for ; Mon, 11 Aug 2014 12:18:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XGoWV-0006BA-4d; Mon, 11 Aug 2014 12:16:23 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XGoWF-00066W-IO for linux-arm-kernel@lists.infradead.org; Mon, 11 Aug 2014 12:16:08 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id A8D1CC1B; Mon, 11 Aug 2014 14:15:56 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (unknown [190.2.108.81]) by mail.free-electrons.com (Postfix) with ESMTPSA id 8602F914; Mon, 11 Aug 2014 14:15:54 +0200 (CEST) From: Ezequiel Garcia To: , Jason Cooper Subject: [PATCH v2 1/6] ARM: mvebu: Add network pin mux configuration for the Armada 370 SoC Date: Mon, 11 Aug 2014 09:14:36 -0300 Message-Id: <1407759281-11513-2-git-send-email-ezequiel.garcia@free-electrons.com> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1407759281-11513-1-git-send-email-ezequiel.garcia@free-electrons.com> References: <1407759281-11513-1-git-send-email-ezequiel.garcia@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140811_051607_784284_039024D2 X-CRM114-Status: UNSURE ( 8.76 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.3 (/) Cc: Gregory Clement , Andrew Lunn , Thomas Petazzoni , Ezequiel Garcia , Sebastian Hesselbarth X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This commit adds the pin mux configuration for the two network interfaces and the MDIO interface in the Armada 370 SoC .dtsi file. Only the configuration for RGMII is added for now. Acked-by: Sebastian Hesselbarth Signed-off-by: Ezequiel Garcia --- arch/arm/boot/dts/armada-370.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 21b588b..f2c55f3 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -151,6 +151,25 @@ "mpp62", "mpp60", "mpp58"; marvell,function = "audio"; }; + + mdio_pins: mdio-pins { + marvell,pins = "mpp17", "mpp18"; + marvell,function = "ge"; + }; + + ge0_rgmii_pins: ge0-rgmii-pins { + marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11", "mpp12", + "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "ge0"; + }; + + ge1_rgmii_pins: ge1-rgmii-pins { + marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22", + "mpp23", "mpp24", "mpp25", "mpp26", + "mpp27", "mpp28", "mpp29", "mpp30"; + marvell,function = "ge1"; + }; }; gpio0: gpio@18100 {