From patchwork Tue Aug 12 07:26:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 4711331 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5DB2DC0338 for ; Tue, 12 Aug 2014 07:06:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7DAAD20125 for ; Tue, 12 Aug 2014 07:06:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A25C220114 for ; Tue, 12 Aug 2014 07:06:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XH68r-00029e-5k; Tue, 12 Aug 2014 07:05:09 +0000 Received: from szxga01-in.huawei.com ([119.145.14.64]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XH68e-0000zA-C0 for linux-arm-kernel@lists.infradead.org; Tue, 12 Aug 2014 07:04:57 +0000 Received: from 172.24.2.119 (EHLO szxeml421-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CAE07906; Tue, 12 Aug 2014 15:03:00 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml421-hub.china.huawei.com (10.82.67.160) with Microsoft SMTP Server id 14.3.158.1; Tue, 12 Aug 2014 15:02:49 +0800 From: Yijing Wang To: Bjorn Helgaas Subject: [RFC PATCH 16/20] arm/iop13xx/MSI: Use msi_chip instead of arch func to configure MSI/MSI-X Date: Tue, 12 Aug 2014 15:26:09 +0800 Message-ID: <1407828373-24322-17-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> References: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140812_000456_932421_5D6AA946 X-CRM114-Status: GOOD ( 13.52 ) X-Spam-Score: -1.4 (-) Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Xinwei Hu , Yijing Wang , "H. Peter Anvin" , sparclinux@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Arnd Bergmann , Konrad Rzeszutek Wilk , Marc Zyngier , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Tony Luck , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce a new struct msi_chip iop13xx_msi_chip instead of weak arch functions to configure MSI/MSI-X. And associate the pci bus with msi_chip in pcibios_add_bus(). Signed-off-by: Yijing Wang --- arch/arm/mach-iop13xx/include/mach/pci.h | 2 ++ arch/arm/mach-iop13xx/iq81340mc.c | 1 + arch/arm/mach-iop13xx/iq81340sc.c | 1 + arch/arm/mach-iop13xx/msi.c | 14 ++++++++++++-- arch/arm/mach-iop13xx/pci.c | 6 ++++++ 5 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-iop13xx/include/mach/pci.h b/arch/arm/mach-iop13xx/include/mach/pci.h index 59f42b5..7a073cb 100644 --- a/arch/arm/mach-iop13xx/include/mach/pci.h +++ b/arch/arm/mach-iop13xx/include/mach/pci.h @@ -10,6 +10,8 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *); void iop13xx_atu_select(struct hw_pci *plat_pci); void iop13xx_pci_init(void); void iop13xx_map_pci_memory(void); +void iop13xx_add_bus(struct pci_bus *bus); +extern struct msi_chip iop13xx_msi_chip; #define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \ PCI_STATUS_SIG_TARGET_ABORT | \ diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 9cd07d3..19d47cb 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -59,6 +59,7 @@ static struct hw_pci iq81340mc_pci __initdata = { .map_irq = iq81340mc_pcix_map_irq, .scan = iop13xx_scan_bus, .preinit = iop13xx_pci_init, + .add_bus = iop13xx_add_bus; }; static int __init iq81340mc_pci_init(void) diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index b3ec11c..4d56993 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -61,6 +61,7 @@ static struct hw_pci iq81340sc_pci __initdata = { .scan = iop13xx_scan_bus, .map_irq = iq81340sc_atux_map_irq, .preinit = iop13xx_pci_init + .add_bus = iop13xx_add_bus; }; static int __init iq81340sc_pci_init(void) diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c index e7730cf..59a9f8f 100644 --- a/arch/arm/mach-iop13xx/msi.c +++ b/arch/arm/mach-iop13xx/msi.c @@ -132,7 +132,7 @@ static struct irq_chip iop13xx_msi_chip = { .irq_unmask = unmask_msi_irq, }; -int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) +int iop13xx_setup_msi_irq(struct device *dev, struct msi_desc *desc) { int id, irq = irq_alloc_desc_from(IRQ_IOP13XX_MSI_0, -1); struct msi_msg msg; @@ -159,7 +159,17 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) return 0; } -void arch_teardown_msi_irq(unsigned int irq) +void iop13xx_teardown_msi_irq(unsigned int irq) { irq_free_desc(irq); } + +struct msi_chip iop13xx_chip = { + .setup_irq = iop13xx_setup_msi_irq, + .teardown_irq = iop13xx_teardown_msi_irq, +}; + +struct msi_chip *arch_get_match_msi_chip(struct device *dev) +{ + return &iop13xx_chip; +} diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 9082b84..f498800 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -962,6 +962,12 @@ void __init iop13xx_atu_select(struct hw_pci *plat_pci) } } +void iop13xx_add_bus(struct pci_bus *bus) +{ + if (IS_ENABLED(CONFIG_PCI_MSI)) + bus->msi = &iop13xx_msi_chip; +} + void __init iop13xx_pci_init(void) { /* clear pre-existing south bridge errors */