From patchwork Wed Aug 13 00:51:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitchel Humpherys X-Patchwork-Id: 4715641 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 086329F377 for ; Wed, 13 Aug 2014 00:54:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 252CF20166 for ; Wed, 13 Aug 2014 00:54:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 34C2920160 for ; Wed, 13 Aug 2014 00:54:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XHMoB-0006uV-Qq; Wed, 13 Aug 2014 00:52:55 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XHMnl-0006Wh-H4 for linux-arm-kernel@lists.infradead.org; Wed, 13 Aug 2014 00:52:30 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id A976A13F8B8; Wed, 13 Aug 2014 00:52:13 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 9D24A13F8BF; Wed, 13 Aug 2014 00:52:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from mitchelh-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mitchelh@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7B00C13F8BD; Wed, 13 Aug 2014 00:52:12 +0000 (UTC) From: Mitchel Humpherys To: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, Will Deacon , devicetree@vger.kernel.org Subject: [PATCH 4/6] iommu/arm-smmu: implement generic DT bindings Date: Tue, 12 Aug 2014 17:51:37 -0700 Message-Id: <1407891099-24641-5-git-send-email-mitchelh@codeaurora.org> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1407891099-24641-1-git-send-email-mitchelh@codeaurora.org> References: <1407891099-24641-1-git-send-email-mitchelh@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140812_175229_652092_34FAE603 X-CRM114-Status: GOOD ( 20.32 ) X-Spam-Score: -0.7 (/) Cc: Mitchel Humpherys X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Generic IOMMU device tree bindings were recently added in ["devicetree: Add generic IOMMU device tree bindings"]. Implement the bindings in the ARM SMMU driver. See Documentation/devicetree/bindings/iommu/iommu.txt for the bindings themselves. Signed-off-by: Mitchel Humpherys --- drivers/iommu/arm-smmu.c | 87 +++++++++++++++++++++++++++++++++++------------- 1 file changed, 64 insertions(+), 23 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 63c6707fad..22e25f3172 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -538,25 +538,32 @@ static int insert_smmu_master(struct arm_smmu_device *smmu, return 0; } +struct iommus_entry { + struct list_head list; + struct device_node *node; + u16 streamids[MAX_MASTER_STREAMIDS]; + int num_sids; +}; + static int register_smmu_master(struct arm_smmu_device *smmu, - struct device *dev, - struct of_phandle_args *masterspec) + struct iommus_entry *entry) { int i; struct arm_smmu_master *master; + struct device *dev = smmu->dev; - master = find_smmu_master(smmu, masterspec->np); + master = find_smmu_master(smmu, entry->node); if (master) { dev_err(dev, "rejecting multiple registrations for master device %s\n", - masterspec->np->name); + entry->node->name); return -EBUSY; } - if (masterspec->args_count > MAX_MASTER_STREAMIDS) { + if (entry->num_sids > MAX_MASTER_STREAMIDS) { dev_err(dev, "reached maximum number (%d) of stream IDs for master device %s\n", - MAX_MASTER_STREAMIDS, masterspec->np->name); + MAX_MASTER_STREAMIDS, entry->node->name); return -ENOSPC; } @@ -564,15 +571,58 @@ static int register_smmu_master(struct arm_smmu_device *smmu, if (!master) return -ENOMEM; - master->of_node = masterspec->np; - master->cfg.num_streamids = masterspec->args_count; + master->of_node = entry->node; + master->cfg.num_streamids = entry->num_sids; for (i = 0; i < master->cfg.num_streamids; ++i) - master->cfg.streamids[i] = masterspec->args[i]; + master->cfg.streamids[i] = entry->streamids[i]; return insert_smmu_master(smmu, master); } +static int arm_smmu_parse_iommus_properties(struct arm_smmu_device *smmu, + int *num_masters) +{ + struct of_phandle_args iommuspec; + struct device_node *dn; + + for_each_node_with_property(dn, "iommus") { + int arg_ind = 0; + struct iommus_entry *entry, *n; + LIST_HEAD(iommus); + + while (!of_parse_phandle_with_args(dn, "iommus", "#iommu-cells", + arg_ind, &iommuspec)) { + int i; + + list_for_each_entry(entry, &iommus, list) + if (entry->node == dn) + break; + if (&entry->list == &iommus) { + entry = devm_kzalloc(smmu->dev, sizeof(*entry), + GFP_KERNEL); + if (!entry) + return -ENOMEM; + entry->node = dn; + list_add(&entry->list, &iommus); + } + entry->num_sids = iommuspec.args_count; + for (i = 0; i < entry->num_sids; ++i) + entry->streamids[i] = iommuspec.args[i]; + arg_ind++; + } + + list_for_each_entry_safe(entry, n, &iommus, list) { + register_smmu_master(smmu, entry); + (*num_masters)++; + list_del(&entry->list); + devm_kfree(smmu->dev, entry); + } + } + + return 0; +} + static struct arm_smmu_device *find_smmu_for_device(struct device *dev) { struct arm_smmu_device *smmu; @@ -2196,8 +2246,7 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) struct arm_smmu_device *smmu; struct device *dev = &pdev->dev; struct rb_node *node; - struct of_phandle_args masterspec; - int num_irqs, i, err; + int num_irqs, i, err, num_masters; smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL); if (!smmu) { @@ -2251,19 +2300,11 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) i = 0; smmu->masters = RB_ROOT; - while (!of_parse_phandle_with_args(dev->of_node, "mmu-masters", - "#stream-id-cells", i, - &masterspec)) { - err = register_smmu_master(smmu, dev, &masterspec); - if (err) { - dev_err(dev, "failed to add master %s\n", - masterspec.np->name); - goto out_put_masters; - } + err = arm_smmu_parse_iommus_properties(smmu, &num_masters); + if (err) + goto out_put_masters; - i++; - } - dev_notice(dev, "registered %d master devices\n", i); + dev_notice(dev, "registered %d master devices\n", num_masters); err = arm_smmu_init_regulators(smmu); if (err)