From patchwork Tue Aug 19 18:21:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 4745391 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C362BC0338 for ; Tue, 19 Aug 2014 18:24:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D66342015D for ; Tue, 19 Aug 2014 18:24:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DED8B20155 for ; Tue, 19 Aug 2014 18:24:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XJo2q-00043w-RY; Tue, 19 Aug 2014 18:22:08 +0000 Received: from mail-bn1lp0144.outbound.protection.outlook.com ([207.46.163.144] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XJo2e-0003xt-99 for linux-arm-kernel@lists.infradead.org; Tue, 19 Aug 2014 18:21:57 +0000 Received: from BN3PR0301CA0079.namprd03.prod.outlook.com (25.160.152.175) by BN1PR03MB252.namprd03.prod.outlook.com (10.255.200.24) with Microsoft SMTP Server (TLS) id 15.0.1005.10; Tue, 19 Aug 2014 18:21:31 +0000 Received: from BN1BFFO11FD022.protection.gbl (2a01:111:f400:7c10::1:140) by BN3PR0301CA0079.outlook.office365.com (2a01:111:e400:401e::47) with Microsoft SMTP Server (TLS) id 15.0.1010.18 via Frontend Transport; Tue, 19 Aug 2014 18:21:31 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1BFFO11FD022.mail.protection.outlook.com (10.58.144.85) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Tue, 19 Aug 2014 18:21:31 +0000 Received: from fabio-Latitude-E6410.am.freescale.net ([10.29.244.72]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s7JILN0j014190; Tue, 19 Aug 2014 11:21:29 -0700 From: Fabio Estevam To: Subject: [PATCH 4/4] ARM: dts: imx6sl-evk: Add LCD support Date: Tue, 19 Aug 2014 15:21:14 -0300 Message-ID: <1408472474-4914-4-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1408472474-4914-1-git-send-email-fabio.estevam@freescale.com> References: <1408472474-4914-1-git-send-email-fabio.estevam@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019006)(6009001)(199003)(189002)(87286001)(19580395003)(50226001)(81342001)(36756003)(19580405001)(44976005)(6806004)(229853001)(74662001)(81542001)(33646002)(21056001)(79102001)(46102001)(31966008)(69596002)(74502001)(76482001)(95666004)(77156001)(4396001)(68736004)(104016003)(76176999)(83322001)(77982001)(2351001)(84676001)(107046002)(62966002)(20776003)(64706001)(47776003)(110136001)(85852003)(50466002)(87936001)(89996001)(106466001)(99396002)(575784001)(102836001)(92726001)(88136002)(83072002)(2371004)(48376002)(81156004)(80022001)(86362001)(97736001)(85306004)(50986999)(26826002)(92566001)(105606002)(104166001)(93916002)(32563001)(473944003); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR03MB252; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:ErrorRetry; A:1; MX:3; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 0308EE423E Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Fabio.Estevam@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140819_112156_485718_33A15EB0 X-CRM114-Status: UNSURE ( 6.61 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: Fabio Estevam , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for the "MX28LCD Seiko 4.3' WVGA" panel. Signed-off-by: Fabio Estevam --- arch/arm/boot/dts/imx6sl-evk.dts | 92 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/imx6sl.dtsi | 6 +++ 2 files changed, 98 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 366eb02..9925c4a 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -20,6 +20,13 @@ reg = <0x80000000 0x40000000>; }; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -74,6 +81,14 @@ regulator-max-microvolt = <4325000>; regulator-boot-on; }; + + reg_lcd_3v3: regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "lcd-3v3"; + gpio = <&gpio4 3 0>; + enable-active-high; + }; }; sound { @@ -340,12 +355,51 @@ >; }; + pinctrl_lcd: lcdgrp { + fsl,pins = < + MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0 + MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0 + MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0 + MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0 + MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0 + MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0 + MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0 + MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0 + MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0 + MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0 + MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0 + MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0 + MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0 + MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0 + MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0 + MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0 + MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0 + MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0 + MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0 + MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0 + MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0 + MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0 + MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0 + MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0 + MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0 + MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0 + MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0 + MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0 + >; + }; + pinctrl_led: ledgrp { fsl,pins = < MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059 >; }; + pinctrl_pwm1: pwmgrp { + fsl,pins = < + MX6SL_PAD_PWM1__PWM1_OUT 0x110b0 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 @@ -488,6 +542,44 @@ status = "okay"; }; +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd>; + lcd-supply = <®_lcd_3v3>; + display = <&display>; + status = "okay"; + + display: display { + bits-per-pixel = <32>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <33500000>; + hactive = <800>; + vactive = <480>; + hback-porch = <89>; + hfront-porch = <164>; + vback-porch = <23>; + vfront-porch = <10>; + hsync-len = <10>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + &ssi2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 505da9e..abdcbf9 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -635,8 +635,14 @@ }; lcdif: lcdif@020f8000 { + compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif"; reg = <0x020f8000 0x4000>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6SL_CLK_LCDIF_PIX>, + <&clks IMX6SL_CLK_LCDIF_AXI>, + <&clks IMX6SL_CLK_DUMMY>; + clock-names = "pix", "axi", "disp_axi"; + status = "disabled"; }; dcp: dcp@020fc000 {