From patchwork Wed Aug 20 17:11:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 4752851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 65EB3C0338 for ; Wed, 20 Aug 2014 17:14:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6154220160 for ; Wed, 20 Aug 2014 17:14:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5F3932015E for ; Wed, 20 Aug 2014 17:14:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XK9Qp-0006yn-Kb; Wed, 20 Aug 2014 17:12:19 +0000 Received: from mail-pa0-f45.google.com ([209.85.220.45]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XK9Qm-0006k6-CI for linux-arm-kernel@lists.infradead.org; Wed, 20 Aug 2014 17:12:17 +0000 Received: by mail-pa0-f45.google.com with SMTP id eu11so12598254pac.4 for ; Wed, 20 Aug 2014 10:11:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Zax0n+enr39lh9x/Taahg2Wz2Y4vHJfE7iwUFBWGEoE=; b=XB/JPtZ+jMG2ubchqjdrWOZHg2jMw50id0/psTp5X+t1YgN1cgmGsNlsLZofjiLlAW rEaXLHxlt70Dn706mUnZ8w/tWUGLxm7RkgnwZbE2fy8E851UR0JWpu9Bbdp2D3TEYY8u 9NswUQOob1REvQzFU8rR4KTjVUzL+4quHTuTwBSCveCrh5rBjrPI4ZbraBYQzGwuz2S5 ygvjAVFJvu0E+I4eJBmTon+SCrf4DCVdZfROLwFdHSc6Icd8Di2YMjztOr30krWCrx8x /lEjj4CaSLVfp3ejjFyRt1u9YTDFTMosSv6jT5FAhtSoML5gG1F6TSEwJ0EeuxliX28A CkgA== X-Gm-Message-State: ALoCoQlH7UqGumXh2ZHjI29Vt/JEQIRA46w7nnB3g7lZlbP3sP/Z0tq5xmMai7pZleYuVjcoJdPH X-Received: by 10.68.236.227 with SMTP id ux3mr29026108pbc.159.1408554712303; Wed, 20 Aug 2014 10:11:52 -0700 (PDT) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [70.73.24.112]) by mx.google.com with ESMTPSA id pk15sm34878716pdb.49.2014.08.20.10.11.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Aug 2014 10:11:51 -0700 (PDT) From: mathieu.poirier@linaro.org To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org Subject: [PATCH v4] coresight: bindings for coresight drivers Date: Wed, 20 Aug 2014 11:11:38 -0600 Message-Id: <1408554698-24459-1-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140820_101216_449130_DCAD6ABB X-CRM114-Status: GOOD ( 14.34 ) X-Spam-Score: -0.7 (/) Cc: devicetree@vger.kernel.org, mathieu.poirier@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pratik Patel Coresight IP blocks allow for the support of HW assisted tracing on ARM SoCs. Bindings for the currently available blocks are presented herein. Signed-off-by: Pratik Patel Signed-off-by: Panchaxari Prasannamurthy Signed-off-by: Mathieu Poirier --- .../devicetree/bindings/arm/coresight.txt | 205 +++++++++++++++++++++ 1 file changed, 205 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/coresight.txt diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt new file mode 100644 index 0000000..2ee594d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -0,0 +1,205 @@ +* CoreSight Components + +CoreSight components are compliant with the ARM CoreSight architecture +specification and can be connected in various topologies to suit a particular +SoCs tracing needs. These trace components can generally be classified as sinks, +links and sources. Trace data produced by one or more sources flows through the +intermediate links connecting the source to the currently selected sink. Each +CoreSight component device should use these properties to describe its hardware +characteristcs. + +Required properties for all components *except* non-configurable replicators: + +- compatible : name of the component used for driver matching. Possible values +include: "arm,coresight-etb10", "arm,coresight-tpiu", "arm,coresight-tmc", +"arm,coresight-funnel", and "arm,coresight-etm3x". All of these have to +be supplemented with "arm,primecell" as drivers are using the AMBA bus +interface. Since non-configurable replicators don't show up on the AMBA +bus they don't need to be post-fixed with "arm,primecell". + +- reg : physical base address and length of the register set(s) of the component. + +- clocks : the clock associated to this component. + +- clock-names: the name of the clock as referenced by the code. Since we are +using the AMBA framework, the name should be "apb_pclk". + +- ports or port: The representation of the component's port layout using the +generic DT graph presentation found in "bindings/graph.txt". + +Non-configurable replicators: + +- compatible: currently supported value is "arm-replicator". Since non-configurable +replicators don't show up on the AMBA hey don't need to be post-fixed with +"arm,primecell". + +- id: a unique number that will identify this replicator. + +- ports or port: same as above. + +Optional properties for Sinks: + +- coresight-default-sink: must be specified for one of the sink devices that is +intended to be made the default sink. Other sink devices must not have this +specified. Not specifying this property on any of the sinks is invalid. + +Optional properties for ETM/PTMs: + +- arm,cp14: must be present if the system accesses ETM/PTM management registers +via co-processor 14. + +- arm,cp14: access to ETM/PTM management registers is made via cp14. + +- cpu: the cpu phandle this ETM/PTM is affined to. When omitted the source is +considered to belong to CPU0. + +Optional property for TMC: + +- arm,buffer-size: size of contiguous buffer space for TMC ETR (embedded trace router) + + +Example: + +1. Sinks + etb: etb@20010000 { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0 0x20010000 0 0x1000>; + + coresight-default-sink; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + etb_in_port: endpoint@0 { + slave-mode; + remote-endpoint = <&replicator_out_port0>; + }; + }; + }; + + tpiu: tpiu@20030000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0 0x20030000 0 0x1000>; + + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + tpiu_in_port: endpoint@0 { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + +2. Links + replicator { + /* non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell". + */ + compatible = "arm,coresight-replicator"; + /* this will show up in debugfs as "0.replicator" */ + id = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port@0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&etb_in_port>; + }; + }; + + port@1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + /* replicator input port */ + port@2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&funnel_out_port0>; + }; + }; + }; + }; + + funnel@20040000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x20040000 0 0x1000>; + + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel output port */ + port@0 { + reg = <0>; + funnel_out_port0: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + + /* funnel input ports */ + port@1 { + reg = <0>; + funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&ptm0_out_port>; + }; + }; + + port@2 { + reg = <1>; + funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&ptm1_out_port>; + }; + }; + + port@3 { + reg = <2>; + funnel_in_port2: endpoint { + slave-mode; + remote-endpoint = <&etm0_out_port>; + }; + }; + + }; + }; + +3. Sources + ptm0: ptm@2201c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0 0x2201c000 0 0x1000>; + + cpu = <&cpu0>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + ptm0_out_port: endpoint { + remote-endpoint = <&funnel_in_port0>; + }; + }; + }; + + ptm1: ptm@2201d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0 0x2201d000 0 0x1000>; + + cpu = <&cpu1>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + ptm1_out_port: endpoint { + remote-endpoint = <&funnel_in_port1>; + }; + }; + };