From patchwork Mon Aug 25 22:59:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 4777081 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9A62B9F2A9 for ; Mon, 25 Aug 2014 23:02:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C4004201D5 for ; Mon, 25 Aug 2014 23:02:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 081F9201D3 for ; Mon, 25 Aug 2014 23:02:28 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XM3FL-0004p5-QT; Mon, 25 Aug 2014 23:00:19 +0000 Received: from mail-vc0-f201.google.com ([209.85.220.201]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XM3Ew-0003ch-5Y for linux-arm-kernel@lists.infradead.org; Mon, 25 Aug 2014 22:59:55 +0000 Received: by mail-vc0-f201.google.com with SMTP id le20so1652452vcb.4 for ; Mon, 25 Aug 2014 15:59:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QyPp/Hy3kCYK3zgsB2PwvD9PZZVwq4c+U9uompJqb5Y=; b=EgqPogPA1zpySDoMiC3m98eWX7++qI9rNNM8qBX6utpZ5lsaZx6XgBZNZYUsrXkF0C 0Yx0nk6lpAw/OPVpt1hv6pKXsr8IBP4LX8RJajCqDDQXHeYHmzfZRNGX5xaFEqoxQpPy NJSaIuB1aQr/DmaY54C+9ZfIWYYj5CBJqVDbUXGIjqpQnDSdoD7tBFCzikDcc1HQCwQm 1CoRLeG8PWpIkC9U8jAI9Un94VwEGysshgDRJk53OMz/joEubJEU/yrkB2mlWdfCGviw XZm5uewlk6nB6orzqiNzLcxsMnoXpPKtLhmKTilao/TqTvxXWzC9dasZyf0tWolM5VTM y5pg== X-Gm-Message-State: ALoCoQls/QLaZ6T1AomXuaI2o6NwndMjm/cjiYKVKVcnf6hZgcNmVbEQpc72xEWY7DJuF2hqsGMM X-Received: by 10.236.230.106 with SMTP id i100mr3015610yhq.27.1409007571657; Mon, 25 Aug 2014 15:59:31 -0700 (PDT) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id n22si89038yhd.1.2014.08.25.15.59.31 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 25 Aug 2014 15:59:31 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.162.15]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id 7C73B31C028; Mon, 25 Aug 2014 15:59:31 -0700 (PDT) Received: by tictac.mtv.corp.google.com (Postfix, from userid 121310) id EB1C980958; Mon, 25 Aug 2014 15:59:30 -0700 (PDT) From: Doug Anderson To: Heiko Stuebner , Thierry Reding , Caesar Wang Subject: [PATCH v5 2/3] ARM: dts: Add main PWM info to rk3288 Date: Mon, 25 Aug 2014 15:59:26 -0700 Message-Id: <1409007567-23523-3-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1409007567-23523-1-git-send-email-dianders@chromium.org> References: <1409007567-23523-1-git-send-email-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140825_155954_283828_6FA42938 X-CRM114-Status: UNSURE ( 9.56 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.0 (+) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux@arm.linux.org.uk, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, Dmitry Torokhov , Doug Anderson , linux-kernel@vger.kernel.org, robh+dt@kernel.org, Eddie Cai , galak@codeaurora.org, olof@lixom.net, Sonny Rao , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, URIBL_BLACK autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the PWM info (other than the VOP PWM) to the main rk3288 dtsi file. Signed-off-by: Caesar Wang Signed-off-by: Doug Anderson --- Changes in v5: - Back to version 3 (no rockchip,grf). Changes in v4: - Add rockchip,grf to pwm nodes. Changes in v3: None arch/arm/boot/dts/rk3288.dtsi | 68 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 36be7bb..9c9d9c5 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -261,6 +261,50 @@ status = "disabled"; }; + pwm0: pwm@ff680000 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680000 0x10>; + #pwm-cells = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + + pwm1: pwm@ff680010 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680010 0x10>; + #pwm-cells = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + + pwm2: pwm@ff680020 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680020 0x10>; + #pwm-cells = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm2_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + + pwm3: pwm@ff680030 { + compatible = "rockchip,rk3288-pwm"; + reg = <0xff680030 0x10>; + #pwm-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3_pin>; + clocks = <&cru PCLK_PWM>; + clock-names = "pwm"; + status = "disabled"; + }; + pmu: power-management@ff730000 { compatible = "rockchip,rk3288-pmu", "syscon"; reg = <0xff730000 0x100>; @@ -611,5 +655,29 @@ rockchip,pins = <5 15 3 &pcfg_pull_none>; }; }; + + pwm0 { + pwm0_pin: pwm0-pin { + rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm1 { + pwm1_pin: pwm1-pin { + rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + pwm2 { + pwm2_pin: pwm2-pin { + rockchip,pins = <7 22 RK_FUNC_3 &pcfg_pull_none>; + }; + }; + + pwm3 { + pwm3_pin: pwm3-pin { + rockchip,pins = <7 23 RK_FUNC_3 &pcfg_pull_none>; + }; + }; }; };