From patchwork Tue Sep 2 21:19:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 4828441 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5F48D9F9B9 for ; Tue, 2 Sep 2014 21:23:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 63A20201DC for ; Tue, 2 Sep 2014 21:23:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C9C02201D5 for ; Tue, 2 Sep 2014 21:23:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XOvUv-0004U1-15; Tue, 02 Sep 2014 21:20:17 +0000 Received: from mail-pa0-x22d.google.com ([2607:f8b0:400e:c03::22d]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XOvUX-0003Bs-8l for linux-arm-kernel@lists.infradead.org; Tue, 02 Sep 2014 21:19:54 +0000 Received: by mail-pa0-f45.google.com with SMTP id bj1so15622670pad.18 for ; Tue, 02 Sep 2014 14:19:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=R2GuXLInvHzJy1Ac5mgBYSnI5rFCYzEL4/XB0rTsvb8=; b=xGsboyiglONdFbWdKMfpn8KK+Q46uLO3Jg4rMY7wnxE/CtGCGcuwB76zklZbS+aF8Z +1VhL1Wf5UUcYl1FRZyn4Fci8SFjLjPbWowgJL74oN4tjeY9/ErGZCQPronsb3EmoSG8 xcQzZIf0A7E2IoGgLo8hWAsPGz+msIfvwC5wjiMJciKjDypsJnBSAwRSjreW2wZilSms hbwBiGtQzVUyQMqZJD/ke/xOe+llbw0Nl6rqFzEpHemZqcSt7rubF+iTFTIfjHOnoHjS 6yzKyRMz530o1uSnwjkdixBYQfPWnFZ1MbEvYiAVa4D5iriRNhtBv5d64VPvOYtwCgTb xASw== X-Received: by 10.66.141.39 with SMTP id rl7mr51371300pab.8.1409692772307; Tue, 02 Sep 2014 14:19:32 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id j5sm6853164pdp.9.2014.09.02.14.19.30 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 02 Sep 2014 14:19:31 -0700 (PDT) From: Soren Brinkmann To: Michal Simek , Daniel Lezcano Subject: [PATCH v2 4/9] ARM: zynq: PM: Enable DDR clock stop Date: Tue, 2 Sep 2014 14:19:09 -0700 Message-Id: <1409692754-13437-5-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 2.1.0.1.g27b9230 In-Reply-To: <1409692754-13437-1-git-send-email-soren.brinkmann@xilinx.com> References: <1409692754-13437-1-git-send-email-soren.brinkmann@xilinx.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140902_141953_375547_28123D7D X-CRM114-Status: GOOD ( 18.89 ) X-Spam-Score: 0.0 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Russell King , Pawel Moll , linux-pm@vger.kernel.org, Ian Campbell , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Rob Herring , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Kumar Gala , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The DDR controller can detect idle periods and leverage low power features clock stop. When new requests occur, the DDRC resumes normal operation. Signed-off-by: Soren Brinkmann Acked-by: Daniel Lezcano --- v2: - properly document return value for zynq_pm_ioremap - change zynq_pm_late_init signature to return void - add kernel doc to late_init() - fix kernel doc - only enable clock-stop during boot and leave out self-refresh. The self-refresh penalty is apparently not-negligible --- arch/arm/mach-zynq/Makefile | 2 +- arch/arm/mach-zynq/common.c | 1 + arch/arm/mach-zynq/common.h | 2 ++ arch/arm/mach-zynq/pm.c | 83 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-zynq/pm.c diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile index 1b25d92ebf22..820dff6e1eba 100644 --- a/arch/arm/mach-zynq/Makefile +++ b/arch/arm/mach-zynq/Makefile @@ -3,7 +3,7 @@ # # Common support -obj-y := common.o slcr.o +obj-y := common.o slcr.o pm.o CFLAGS_REMOVE_hotplug.o =-march=armv6k CFLAGS_hotplug.o =-Wa,-march=armv7-a -mcpu=cortex-a9 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 3cb7c198615a..6bd13e5ce6b7 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -101,6 +101,7 @@ static int __init zynq_get_revision(void) static void __init zynq_init_late(void) { zynq_core_pm_init(); + zynq_pm_late_init(); } /** diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index 596ef0b5067c..0edbb6997b1c 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -40,6 +40,8 @@ extern void __iomem *zynq_scu_base; /* Hotplug */ extern void zynq_platform_cpu_die(unsigned int cpu); +void zynq_pm_late_init(void); + static inline void zynq_core_pm_init(void) { /* A9 clock gating */ diff --git a/arch/arm/mach-zynq/pm.c b/arch/arm/mach-zynq/pm.c new file mode 100644 index 000000000000..911fcf865be8 --- /dev/null +++ b/arch/arm/mach-zynq/pm.c @@ -0,0 +1,83 @@ +/* + * Zynq power management + * + * Copyright (C) 2012 - 2014 Xilinx + * + * Sören Brinkmann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include "common.h" + +/* register offsets */ +#define DDRC_CTRL_REG1_OFFS 0x60 +#define DDRC_DRAM_PARAM_REG3_OFFS 0x20 + +/* bitfields */ +#define DDRC_CLOCKSTOP_MASK BIT(23) +#define DDRC_SELFREFRESH_MASK BIT(12) + +static void __iomem *ddrc_base; + +/** + * zynq_pm_ioremap() - Create IO mappings + * @comp: DT compatible string + * Return: Pointer to the mapped memory or NULL. + * + * Remap the memory region for a compatible DT node. + */ +static void __iomem *zynq_pm_ioremap(const char *comp) +{ + struct device_node *np; + void __iomem *base = NULL; + + np = of_find_compatible_node(NULL, NULL, comp); + if (np) { + base = of_iomap(np, 0); + of_node_put(np); + } else { + pr_warn("%s: no compatible node found for '%s'\n", __func__, + comp); + } + + return base; +} + +/** + * zynq_pm_late_init() - Power management init + * + * Initialization of power management related featurs and infrastructure. + */ +void __init zynq_pm_late_init(void) +{ + u32 reg; + + ddrc_base = zynq_pm_ioremap("xlnx,zynq-ddrc-a05"); + if (!ddrc_base) { + pr_warn("%s: Unable to map DDRC IO memory.\n", __func__); + } else { + /* + * Enable DDRC clock stop feature. The HW takes care of + * entering/exiting the correct mode depending + * on activity state. + */ + reg = readl(ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS); + reg |= DDRC_CLOCKSTOP_MASK; + writel(reg, ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS); + } +}