From patchwork Mon Sep 8 13:54:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liviu Dudau X-Patchwork-Id: 4862451 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3F0C09F35F for ; Mon, 8 Sep 2014 14:08:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D036620149 for ; Mon, 8 Sep 2014 14:08:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 898CE20145 for ; Mon, 8 Sep 2014 14:08:23 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XQza4-0000Sx-6j; Mon, 08 Sep 2014 14:06:08 +0000 Received: from fw-tnat.cambridge.arm.com ([217.140.96.21] helo=cam-smtp0.cambridge.arm.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XQzZq-0000DN-Tb for linux-arm-kernel@lists.infradead.org; Mon, 08 Sep 2014 14:05:55 +0000 Received: from e106497-lin.cambridge.arm.com (e106497-lin.cambridge.arm.com [10.1.195.53]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id s88DsW8F017520; Mon, 8 Sep 2014 14:54:34 +0100 From: Liviu Dudau To: Bjorn Helgaas , Arnd Bergmann , Rob Herring , Jason Gunthorpe , Benjamin Herrenschmidt , Catalin Marinas , Will Deacon , Russell King , linux-pci , Linus Walleij Subject: [PATCH v10 02/10] PCI: Introduce helper functions to deal with PCI I/O ranges. Date: Mon, 8 Sep 2014 14:54:24 +0100 Message-Id: <1410184472-17630-3-git-send-email-Liviu.Dudau@arm.com> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1410184472-17630-1-git-send-email-Liviu.Dudau@arm.com> References: <1410184472-17630-1-git-send-email-Liviu.Dudau@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140908_070555_298337_5F798566 X-CRM114-Status: GOOD ( 19.83 ) X-Spam-Score: -4.8 (----) Cc: linux-arch , Sinan Kaya , Kukjin Kim , Device Tree ML , Jingoo Han , LKML , Grant Likely , Tanmay Inamdar , Suravee Suthikulanit , Grant Likely , LAKML X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some architectures do not have a simple view of the PCI I/O space and instead use a range of CPU addresses that map to bus addresses. For some architectures these ranges will be expressed by OF bindings in a device tree file. This patch introduces a pci_register_io_range() helper function with a generic implementation that can be used by such architectures to keep track of the I/O ranges described by the PCI bindings. If the PCI_IOBASE macro is not defined that signals lack of support for PCI and we return an error. In order to retrieve the CPU address associated with an I/O port, a new helper function pci_pio_to_address() is introduced. This will search in the list of ranges registered with pci_register_io_range() and return the CPU address that corresponds to the given port. Cc: Grant Likely Cc: Arnd Bergmann Reviewed-by: Catalin Marinas Acked-by: Rob Herring Signed-off-by: Liviu Dudau --- drivers/of/address.c | 100 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/of_address.h | 2 + 2 files changed, 102 insertions(+) diff --git a/drivers/of/address.c b/drivers/of/address.c index e371825..2373a92 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -5,6 +5,7 @@ #include #include #include +#include #include /* Max address size we deal with */ @@ -601,12 +602,111 @@ const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, } EXPORT_SYMBOL(of_get_address); +#ifdef PCI_IOBASE +struct io_range { + struct list_head list; + phys_addr_t start; + resource_size_t size; +}; + +static LIST_HEAD(io_range_list); +static DEFINE_SPINLOCK(io_range_lock); +#endif + +/* + * Record the PCI IO range (expressed as CPU physical address + size). + * Return a negative value if an error has occured, zero otherwise + */ +int __weak pci_register_io_range(phys_addr_t addr, resource_size_t size) +{ +#ifdef PCI_IOBASE + struct io_range *range; + resource_size_t allocated_size = 0; + + /* check if the range hasn't been previously recorded */ + spin_lock(&io_range_lock); + list_for_each_entry(range, &io_range_list, list) { + if (addr >= range->start && addr + size <= range->start + size) + return 0; + allocated_size += range->size; + } + spin_unlock(&io_range_lock); + + /* range not registed yet, check for available space */ + if (allocated_size + size - 1 > IO_SPACE_LIMIT) { + /* if it's too big check if 64K space can be reserved */ + if (allocated_size + SZ_64K - 1 > IO_SPACE_LIMIT) + return -E2BIG; + + size = SZ_64K; + pr_warn("Requested IO range too big, new size set to 64K\n"); + } + + /* add the range to the list */ + range = kzalloc(sizeof(*range), GFP_KERNEL); + if (!range) + return -ENOMEM; + + range->start = addr; + range->size = size; + + spin_lock(&io_range_lock); + list_add_tail(&range->list, &io_range_list); + spin_unlock(&io_range_lock); +#endif + + return 0; +} + +phys_addr_t pci_pio_to_address(unsigned long pio) +{ + phys_addr_t address = (phys_addr_t)OF_BAD_ADDR; + +#ifdef PCI_IOBASE + struct io_range *range; + resource_size_t allocated_size = 0; + + if (pio > IO_SPACE_LIMIT) + return address; + + spin_lock(&io_range_lock); + list_for_each_entry(range, &io_range_list, list) { + if (pio >= allocated_size && pio < allocated_size + range->size) { + address = range->start + pio - allocated_size; + break; + } + allocated_size += range->size; + } + spin_unlock(&io_range_lock); +#endif + + return address; +} + unsigned long __weak pci_address_to_pio(phys_addr_t address) { +#ifdef PCI_IOBASE + struct io_range *res; + resource_size_t offset = 0; + unsigned long addr = -1; + + spin_lock(&io_range_lock); + list_for_each_entry(res, &io_range_list, list) { + if (address >= res->start && address < res->start + res->size) { + addr = res->start - address + offset; + break; + } + offset += res->size; + } + spin_unlock(&io_range_lock); + + return addr; +#else if (address > IO_SPACE_LIMIT) return (unsigned long)-1; return (unsigned long) address; +#endif } static int __of_address_to_resource(struct device_node *dev, diff --git a/include/linux/of_address.h b/include/linux/of_address.h index fb7b722..f8cc7da 100644 --- a/include/linux/of_address.h +++ b/include/linux/of_address.h @@ -55,7 +55,9 @@ extern void __iomem *of_iomap(struct device_node *device, int index); extern const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, unsigned int *flags); +extern int pci_register_io_range(phys_addr_t addr, resource_size_t size); extern unsigned long pci_address_to_pio(phys_addr_t addr); +extern phys_addr_t pci_pio_to_address(unsigned long pio); extern int of_pci_range_parser_init(struct of_pci_range_parser *parser, struct device_node *node);