From patchwork Wed Sep 17 20:16:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitchel Humpherys X-Patchwork-Id: 4926651 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5E18A9F2EC for ; Wed, 17 Sep 2014 20:17:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3CE4D20142 for ; Wed, 17 Sep 2014 20:19:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F5282011D for ; Wed, 17 Sep 2014 20:19:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XULf2-000814-Jc; Wed, 17 Sep 2014 20:17:08 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XULeq-0007g6-Oo for linux-arm-kernel@lists.infradead.org; Wed, 17 Sep 2014 20:16:57 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 1D9E213FA26; Wed, 17 Sep 2014 20:16:41 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 114E813FA2E; Wed, 17 Sep 2014 20:16:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from mitchelh-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mitchelh@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A21ED13FA2A; Wed, 17 Sep 2014 20:16:40 +0000 (UTC) From: Mitchel Humpherys To: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, Will Deacon , Joerg Roedel Subject: [PATCH 2/2] iommu/arm-smmu: add support for access-protected mappings Date: Wed, 17 Sep 2014 13:16:09 -0700 Message-Id: <1410984969-2340-3-git-send-email-mitchelh@codeaurora.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1410984969-2340-1-git-send-email-mitchelh@codeaurora.org> References: <1410984969-2340-1-git-send-email-mitchelh@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140917_131656_843507_C29B52AC X-CRM114-Status: GOOD ( 13.83 ) X-Spam-Score: -0.7 (/) Cc: Olav Haugan , Mitchel Humpherys X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP ARM SMMUs support memory access control via some bits in the translation table descriptor memory attributes. Currently we assume all translations are "unprivileged". Add support for privileged mappings, controlled by the IOMMU_PRIV prot flag. Also sneak in a whitespace change for consistency with nearby code. Signed-off-by: Mitchel Humpherys --- drivers/iommu/arm-smmu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index ca18d6d42a..93999ec22c 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1256,10 +1256,11 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_device *smmu, pmd_t *pmd, } if (stage == 1) { - pteval |= ARM_SMMU_PTE_AP_UNPRIV | ARM_SMMU_PTE_nG; + pteval |= ARM_SMMU_PTE_nG; + if (!(prot & IOMMU_PRIV)) + pteval |= ARM_SMMU_PTE_AP_UNPRIV; if (!(prot & IOMMU_WRITE) && (prot & IOMMU_READ)) pteval |= ARM_SMMU_PTE_AP_RDONLY; - if (prot & IOMMU_CACHE) pteval |= (MAIR_ATTR_IDX_CACHE << ARM_SMMU_PTE_ATTRINDX_SHIFT);