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[92.226.144.207]) by mx.google.com with ESMTPSA id wx3sm6308280wjc.19.2014.09.20.11.06.36 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 20 Sep 2014 11:06:36 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH 2/5] PCI: mvebu: Count number of lanes Date: Sat, 20 Sep 2014 20:06:28 +0200 Message-Id: <1411236391-422-3-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1411236391-422-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1411236391-422-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140920_110700_067118_4EB42F65 X-CRM114-Status: GOOD ( 13.64 ) X-Spam-Score: -0.8 (/) Cc: Mark Rutland , Andrew Lunn , Jason Cooper , Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, Gregory Clement , devicetree@vger.kernel.org, Rob Herring , Kumar Gala , Bjorn Helgaas , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some PCIe controllers found on Armada XP SoCs can be configured as either four single-lane x1 or one quad-lane x4 PCIe. Although we are not (yet) interested in the physical configuration of the PCIe controller, we will need it when proper PHY support for PCIe is added. Adapt the driver to the amended DT semantic and count the number of PCIe lanes. Signed-off-by: Sebastian Hesselbarth --- Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Bjorn Helgaas Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Thomas Petazzoni Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/host/pci-mvebu.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index a8c6f1a92e0f..0feee6cd395c 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -115,6 +115,7 @@ struct mvebu_pcie_port { void __iomem *base; u32 port; u32 lane; + int num_lanes; int devfn; unsigned int mem_target; unsigned int mem_attr; @@ -982,9 +983,17 @@ static int mvebu_pcie_probe(struct platform_device *pdev) continue; } - if (of_property_read_u32(child, "marvell,pcie-lane", - &port->lane)) + /* + * If there are multiple lanes, we are only interested in the + * number of the first lane and the lane count. + */ + if (of_property_read_u32_index(child, "marvell,pcie-lane", + 0, &port->lane)) port->lane = 0; + port->num_lanes = of_property_count_u32_elems(child, + "marvell,pcie-lane"); + if (!port->num_lanes) + port->num_lanes = 1; port->name = kasprintf(GFP_KERNEL, "pcie%d.%d", port->port, port->lane);