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+Secondary CPU management unit:
+-------------------------------
+
+This document describes the "amlogic,meson6-cpuconfig" node for enabling the
+secondary CPU.
+
+Required node properties:
+- compatible value : = "amlogic,meson6-cpuconfig";
+- reg : physical base address and the size of the registers window
+
+Example:
+
+ cpuconfig@d901ff80 {
+ compatible = "amlogic,meson6-cpuconfig";
+ reg = <0xd901ff80 0x8>;
+ };
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+Secondary CPU enable-method "amlogic,meson6-smp" binding:
+----------------------------------------------------------
+
+This document describes the "amlogic,meson6-smp" method for enabling secondary
+CPUs. To apply to all CPUs, a single "amlogic,meson6-smp" enable method should
+be defined in the "cpus" node.
+
+Example:
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "amlogic,meson6-smp";
+
+ cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x200>;
+ };
+
+ cpu@201 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x201>;
+ };
+ };
Documentation for the devicetree bindings introduced with the SMP support Signed-off-by: Carlo Caione <carlo@caione.org> --- .../bindings/arm/meson/amlogic,meson6-cpuconfig | 16 +++++++++++++ .../bindings/arm/meson/amlogic,meson6-smp | 26 ++++++++++++++++++++++ 2 files changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/meson/amlogic,meson6-cpuconfig create mode 100644 Documentation/devicetree/bindings/arm/meson/amlogic,meson6-smp