From patchwork Tue Sep 30 14:30:48 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhilash Kesavan X-Patchwork-Id: 5003691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A1C61BEEA6 for ; Tue, 30 Sep 2014 14:35:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 90C53201C7 for ; Tue, 30 Sep 2014 14:35:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 708142018E for ; Tue, 30 Sep 2014 14:35:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XYyUZ-0005xt-HR; Tue, 30 Sep 2014 14:33:27 +0000 Received: from mail-pd0-x22b.google.com ([2607:f8b0:400e:c02::22b]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XYyT0-0002vR-61 for linux-arm-kernel@lists.infradead.org; Tue, 30 Sep 2014 14:31:51 +0000 Received: by mail-pd0-f171.google.com with SMTP id ft15so3635804pdb.30 for ; Tue, 30 Sep 2014 07:31:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=XjLA5mI8scptq06fLfjgAEUo8dwwtGNrQIX6W9EAzcY=; b=fIjEzsOCrWPqDnps76TSQLxebQXEUPreHy+2DJ6x4dvcnOe3SrecEbU9ghqXdG03gR +SdGZGnJw/84JXekJI5uGqp43QcRxAlYWkHHHLgCYB29LIiL2+7zlEdqeVTVVUqTdnPy dI/7KoggDunGxBTkxkUmhW+eaq6h7p1Nr/vKYwkA25UFJXSLviVDm/NU0WXSyxi9b54d AxWrQiYKmm4t4SDwDGU6Iz9dJpXH1wixneE4NmjbRkVYZPt6JVDhffNpPj0qstctKpc9 iJfAipcjTpda8J5yh+TFshgeztim7uxlO22e0TNfhHwOb8NsvxnNcZC96kKZhE6tniDJ HG9w== X-Received: by 10.66.244.107 with SMTP id xf11mr57674774pac.36.1412087489017; Tue, 30 Sep 2014 07:31:29 -0700 (PDT) Received: from localhost.localdomain ([122.167.172.42]) by mx.google.com with ESMTPSA id ic5sm15366345pbb.3.2014.09.30.07.31.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 30 Sep 2014 07:31:28 -0700 (PDT) From: Abhilash Kesavan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 4/6] pinctrl: exynos: Add initial driver data for Exynos7 Date: Tue, 30 Sep 2014 20:00:48 +0530 Message-Id: <1412087450-10495-5-git-send-email-a.kesavan@samsung.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1412087450-10495-1-git-send-email-a.kesavan@samsung.com> References: <1412087450-10495-1-git-send-email-a.kesavan@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140930_073150_433561_435D8F71 X-CRM114-Status: GOOD ( 13.59 ) X-Spam-Score: -0.7 (/) Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, robh@kernel.org, catalin.marinas@arm.com, linus.walleij@linaro.org, tomasz.figa@gmail.com, naveenkrishna.ch@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Naveen Krishna Ch This patch adds initial driver data for Exynos7 pinctrl support. Signed-off-by: Naveen Krishna Ch Signed-off-by: Abhilash Kesavan Reviewed-by: Thomas Abraham Tested-by: Thomas Abraham Acked-by: Tomasz Figa Cc: Linus Walleij --- .../bindings/pinctrl/samsung-pinctrl.txt | 1 + drivers/pinctrl/samsung/pinctrl-exynos.c | 113 ++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 4 files changed, 117 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index f80519a..8425838 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -18,6 +18,7 @@ Required Properties: - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller. - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. + - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of the address space it occupies. diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index 771e821..bd2fd9b 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -1189,3 +1189,116 @@ struct samsung_pin_ctrl exynos5420_pin_ctrl[] = { .label = "exynos5420-gpio-ctrl4", }, }; + +/* pin banks of exynos7 pin-controller - ALIVE */ +static struct samsung_pin_bank exynos7_pin_banks0[] = { + EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), + EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04), + EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08), + EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c), +}; + +/* pin banks of exynos7 pin-controller - BUS0 */ +static struct samsung_pin_bank exynos7_pin_banks1[] = { + EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc0", 0x04), + EXYNOS_PIN_BANK_EINTG(2, 0x040, "gpc1", 0x08), + EXYNOS_PIN_BANK_EINTG(6, 0x060, "gpc2", 0x0c), + EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpc3", 0x10), + EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14), + EXYNOS_PIN_BANK_EINTG(6, 0x0c0, "gpd1", 0x18), + EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpd2", 0x1c), + EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpd4", 0x20), + EXYNOS_PIN_BANK_EINTG(4, 0x120, "gpd5", 0x24), + EXYNOS_PIN_BANK_EINTG(6, 0x140, "gpd6", 0x28), + EXYNOS_PIN_BANK_EINTG(3, 0x160, "gpd7", 0x2c), + EXYNOS_PIN_BANK_EINTG(2, 0x180, "gpd8", 0x30), + EXYNOS_PIN_BANK_EINTG(2, 0x1a0, "gpg0", 0x34), + EXYNOS_PIN_BANK_EINTG(4, 0x1c0, "gpg3", 0x38), +}; + +/* pin banks of exynos7 pin-controller - NFC */ +static struct samsung_pin_bank exynos7_pin_banks2[] = { + EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00), +}; + +/* pin banks of exynos7 pin-controller - TOUCH */ +static struct samsung_pin_bank exynos7_pin_banks3[] = { + EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00), +}; + +/* pin banks of exynos7 pin-controller - FF */ +static struct samsung_pin_bank exynos7_pin_banks4[] = { + EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpg4", 0x00), +}; + +/* pin banks of exynos7 pin-controller - ESE */ +static struct samsung_pin_bank exynos7_pin_banks5[] = { + EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpv7", 0x00), +}; + +/* pin banks of exynos7 pin-controller - FSYS0 */ +static struct samsung_pin_bank exynos7_pin_banks6[] = { + EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpr4", 0x00), +}; + +/* pin banks of exynos7 pin-controller - FSYS1 */ +static struct samsung_pin_bank exynos7_pin_banks7[] = { + EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpr0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpr1", 0x04), + EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr2", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c), +}; + +struct samsung_pin_ctrl exynos7_pin_ctrl[] = { + { + /* pin-controller instance 0 Alive data */ + .pin_banks = exynos7_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks0), + .eint_gpio_init = exynos_eint_gpio_init, + .eint_wkup_init = exynos_eint_wkup_init, + .label = "exynos7-gpio-ctrl0", + }, { + /* pin-controller instance 1 BUS0 data */ + .pin_banks = exynos7_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks1), + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos7-gpio-ctrl1", + }, { + /* pin-controller instance 2 NFC data */ + .pin_banks = exynos7_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks2), + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos7-gpio-ctrl2", + }, { + /* pin-controller instance 3 TOUCH data */ + .pin_banks = exynos7_pin_banks3, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks3), + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos7-gpio-ctrl3", + }, { + /* pin-controller instance 4 FF data */ + .pin_banks = exynos7_pin_banks4, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks4), + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos7-gpio-ctrl4", + }, { + /* pin-controller instance 5 ESE data */ + .pin_banks = exynos7_pin_banks5, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks5), + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos7-gpio-ctrl5", + }, { + /* pin-controller instance 6 FSYS0 data */ + .pin_banks = exynos7_pin_banks6, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks6), + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos7-gpio-ctrl6", + }, { + /* pin-controller instance 7 FSYS1 data */ + .pin_banks = exynos7_pin_banks7, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks7), + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos7-gpio-ctrl7", + }, +}; diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 2d37c8f..3c84806 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1226,6 +1226,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = (void *)exynos5420_pin_ctrl }, { .compatible = "samsung,s5pv210-pinctrl", .data = (void *)s5pv210_pin_ctrl }, + { .compatible = "samsung,exynos7-pinctrl", + .data = (void *)exynos7_pin_ctrl }, #endif #ifdef CONFIG_PINCTRL_S3C64XX { .compatible = "samsung,s3c64xx-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index d2c38c8..c0a48ac1 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -244,6 +244,7 @@ extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5250_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5260_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5420_pin_ctrl[]; +extern struct samsung_pin_ctrl exynos7_pin_ctrl[]; extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2412_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2416_pin_ctrl[];