diff mbox

arm: socfpga: fix fetching cpu1start_addr for system with > 2GB of ram

Message ID 1412161334-12359-1-git-send-email-dinguyen@opensource.altera.com (mailing list archive)
State New, archived
Headers show

Commit Message

dinguyen@opensource.altera.com Oct. 1, 2014, 11:02 a.m. UTC 
From: Dinh Nguyen <dinguyen@opensource.altera.com>

When CPU1 is brought out of reset, it's MMU is not turned yet, so it will only
be able to use physical addresses. For systems with 1GB or less, clearing
0x40000000 will work just fine. However for systems with 2GB or more, we
need to clear at least 0x80000000.

Essentially, the bic instruction is converting the cpu1start_addr from a
virtual to a physical address. We should be using bic 0xf0000000 for all
systems.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
 arch/arm/mach-socfpga/headsmp.S | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

Comments

Russell King - ARM Linux Oct. 1, 2014, 1:20 p.m. UTC | #1 
On Wed, Oct 01, 2014 at 06:02:14AM -0500, dinguyen@opensource.altera.com wrote:
> From: Dinh Nguyen <dinguyen@opensource.altera.com>
> 
> When CPU1 is brought out of reset, it's MMU is not turned yet, so it will only
> be able to use physical addresses. For systems with 1GB or less, clearing
> 0x40000000 will work just fine. However for systems with 2GB or more, we
> need to clear at least 0x80000000.
> 
> Essentially, the bic instruction is converting the cpu1start_addr from a
> virtual to a physical address. We should be using bic 0xf0000000 for all
> systems.

Err.  Why not do the job properly rather than create this type of hack?
This is not a fast path, so it's really not required to code it for an
absolute minimum number of cycles.  So...

	adr	r0, 1f		@ physical address of '1'
	ldmia	r0, {r1, r2}	@ load virtual address of '1' and 'cpu1start_addr'
	sub	r0, r0, r1	@ offset between virtual and physical
	ldr	r2, [r2, r0]	@ load *cpu1start_addr
	bx	r2
...
	.align
1:	.long	.
	.long	cpu1start_addr

will fix it properly.
diff mbox

Patch

diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index 95c115d..d686f99 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -16,9 +16,8 @@  ENTRY(secondary_trampoline)
 	movw	r2, #:lower16:cpu1start_addr
 	movt  r2, #:upper16:cpu1start_addr
 
-	/* The socfpga VT cannot handle a 0xC0000000 page offset when loading
-		the cpu1start_addr, we bit clear it. Tested on HW and VT. */
-	bic	r2, r2, #0x40000000
+	/* convert cpu1start_addr to a physical address */
+	bic	r2, r2, #0xf0000000
 
 	ldr	r0, [r2]
 	ldr	r1, [r0]