From patchwork Fri Oct 3 21:09:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: dinguyen@opensource.altera.com X-Patchwork-Id: 5024761 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 69043C11AB for ; Fri, 3 Oct 2014 21:16:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 75636201FE for ; Fri, 3 Oct 2014 21:16:52 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 606A0201F5 for ; Fri, 3 Oct 2014 21:16:51 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XaAA9-0006pH-KI; Fri, 03 Oct 2014 21:13:17 +0000 Received: from mail-bn1bon0055.outbound.protection.outlook.com ([157.56.111.55] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XaAA6-0006mP-Il for linux-arm-kernel@lists.infradead.org; Fri, 03 Oct 2014 21:13:15 +0000 Received: from linux-builds1.altera.com (64.129.157.38) by CY1PR0301MB1196.namprd03.prod.outlook.com (25.160.165.27) with Microsoft SMTP Server (TLS) id 15.0.1039.15; Fri, 3 Oct 2014 21:12:49 +0000 From: To: Subject: [PATCHv2] arm: socfpga: fix fetching cpu1start_addr for system with > 2GB of ram Date: Fri, 3 Oct 2014 16:09:00 -0500 Message-ID: <1412370540-20670-1-git-send-email-dinguyen@opensource.altera.com> X-Mailer: git-send-email 2.0.3 MIME-Version: 1.0 X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BLUPR05CA0075.namprd05.prod.outlook.com (10.141.20.45) To CY1PR0301MB1196.namprd03.prod.outlook.com (25.160.165.27) X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:CY1PR0301MB1196; X-Forefront-PRVS: 0353563E2B X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(6009001)(199003)(189002)(62966002)(19580395003)(81156004)(19580405001)(33646002)(20776003)(229853001)(53416004)(86362001)(106356001)(93916002)(50466002)(101416001)(31966008)(2351001)(85306004)(122386002)(40100001)(21056001)(48376002)(46102003)(80022003)(69596002)(88136002)(50986999)(110136001)(89996001)(107046002)(87286001)(92566001)(85852003)(77096002)(87976001)(77156001)(66066001)(10300001)(64706001)(99396003)(47776003)(97736003)(105586002)(104166001)(102836001)(95666004)(76482002)(120916001)(86152002)(50226001)(42186005)(4396001)(92726001); DIR:OUT; SFP:1101; SCL:1; SRVR:CY1PR0301MB1196; H:linux-builds1.altera.com; FPR:; MLV:sfv; PTR:InfoNoRecords; A:0; MX:1; LANG:en; X-OriginatorOrg: opensource.altera.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141003_141314_815359_3B4E1BF4 X-CRM114-Status: GOOD ( 14.40 ) X-Spam-Score: -0.2 (/) Cc: Dinh Nguyen , dinh.linux@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen When CPU1 is brought out of reset, it's MMU is not turned yet, so it will only be able to use physical addresses. For systems with 1GB or less, clearing 0x40000000 will work just fine, as it was just converting the virtual address of &cpu1start_addr into a physical address. But for systems with > 2BG, bit clearing 0x40000000 is not enough to get the physical address of &cpu1start_addr correctly. This patch fixes the secondary_trampoline code to correctly fetch the physical address of cpu1start_addr directly. While at it, change the name of cpu1start_addr to socfpga_cpu1start_addr to avoid any future naming collisions for multiplatform image. Signed-off-by: Dinh Nguyen --- v2: Correctly get the physical address instead of just a BIC hack. --- arch/arm/mach-socfpga/core.h | 2 +- arch/arm/mach-socfpga/headsmp.S | 13 +++++-------- arch/arm/mach-socfpga/platsmp.c | 5 +++-- arch/arm/mach-socfpga/socfpga.c | 3 +-- 4 files changed, 10 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h index 572b8f7..60c443d 100644 --- a/arch/arm/mach-socfpga/core.h +++ b/arch/arm/mach-socfpga/core.h @@ -40,7 +40,7 @@ extern void __iomem *rst_manager_base_addr; extern struct smp_operations socfpga_smp_ops; extern char secondary_trampoline, secondary_trampoline_end; -extern unsigned long cpu1start_addr; +extern unsigned long socfpga_cpu1start_addr; #define SOCFPGA_SCU_VIRT_BASE 0xfffec000 diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S index 95c115d..43cbbf5 100644 --- a/arch/arm/mach-socfpga/headsmp.S +++ b/arch/arm/mach-socfpga/headsmp.S @@ -13,17 +13,14 @@ .arch armv7-a ENTRY(secondary_trampoline) - movw r2, #:lower16:cpu1start_addr - movt r2, #:upper16:cpu1start_addr - - /* The socfpga VT cannot handle a 0xC0000000 page offset when loading - the cpu1start_addr, we bit clear it. Tested on HW and VT. */ - bic r2, r2, #0x40000000 - - ldr r0, [r2] + ldr r0, 1f ldr r1, [r0] bx r1 + .globl socfpga_cpu1start_addr +socfpga_cpu1start_addr: +1: .space 4 + ENTRY(secondary_trampoline_end) ENTRY(socfpga_secondary_startup) diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c index 5356a72..ba84c58 100644 --- a/arch/arm/mach-socfpga/platsmp.c +++ b/arch/arm/mach-socfpga/platsmp.c @@ -33,11 +33,12 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) { int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; - if (cpu1start_addr) { + if (socfpga_cpu1start_addr) { memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); __raw_writel(virt_to_phys(socfpga_secondary_startup), - (sys_manager_base_addr + (cpu1start_addr & 0x000000ff))); + (sys_manager_base_addr + (socfpga_cpu1start_addr + & 0x000000ff))); flush_cache_all(); smp_wmb(); diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index adbf383..a6fdb98 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -29,7 +29,6 @@ void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE)); void __iomem *sys_manager_base_addr; void __iomem *rst_manager_base_addr; -unsigned long cpu1start_addr; static struct map_desc scu_io_desc __initdata = { .virtual = SOCFPGA_SCU_VIRT_BASE, @@ -70,7 +69,7 @@ void __init socfpga_sysmgr_init(void) np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); if (of_property_read_u32(np, "cpu1-start-addr", - (u32 *) &cpu1start_addr)) + (u32 *) &socfpga_cpu1start_addr)) pr_err("SMP: Need cpu1-start-addr in device tree.\n"); sys_manager_base_addr = of_iomap(np, 0);