From patchwork Thu Oct 9 10:03:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Kaneko X-Patchwork-Id: 5057441 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 90821C11AB for ; Thu, 9 Oct 2014 10:08:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 909E12015D for ; Thu, 9 Oct 2014 10:08:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC2ED20115 for ; Thu, 9 Oct 2014 10:08:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XcAbq-00011a-2U; Thu, 09 Oct 2014 10:06:10 +0000 Received: from mail-ig0-x234.google.com ([2607:f8b0:4001:c05::234]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XcAb8-0008N0-6b for linux-arm-kernel@lists.infradead.org; Thu, 09 Oct 2014 10:05:27 +0000 Received: by mail-ig0-f180.google.com with SMTP id uq10so3150517igb.13 for ; Thu, 09 Oct 2014 03:05:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LU1WqNBAU1r1Ed6zNh5/yM92u9kT1Vx5AJzMmfr2o2U=; b=U19CvsNd9dumw2oN4NqGFbrMQoZl2nZw/gT085c4kNOvd22tHfKrl03edKuKnPC5d+ B6EomN7/Ant4Tkssn+Uoq4oxi6+6qm9S7XkNJ/JH9/NhKfa1lbJis5YVM45JYdT9BOvK XqM4pauVtG6oPBiJxaxQzv0ZmA1a6Uzk6MRoupet1C9MLwM4u1m9US5yyUI1U55T/4Nd O/OVz0vOepDZPq/+OxBECZO/OE4wnYhZ3wUx2GjVNHU6YLFAincTw/hmd1DwIrA6x1cj 4f0GyNkpItsWBFYoHNsq8kHNY/10c5ueS4ICuEj8IDYAQfNXhW3Rojnlr+IeC05d9Vk5 7ovw== X-Received: by 10.42.81.147 with SMTP id z19mr6268325ick.79.1412849104225; Thu, 09 Oct 2014 03:05:04 -0700 (PDT) Received: from localhost.localdomain (p5095-ipngn6701marunouchi.tokyo.ocn.ne.jp. [153.174.4.95]) by mx.google.com with ESMTPSA id jj6sm20456139igb.15.2014.10.09.03.05.02 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Oct 2014 03:05:03 -0700 (PDT) From: Yoshihiro Kaneko To: linux-sh@vger.kernel.org Subject: [PATCH 4/4] ARM: shmobile: r8a7791: Add MMP clock to device tree Date: Thu, 9 Oct 2014 19:03:05 +0900 Message-Id: <1412848985-29353-5-git-send-email-ykaneko0929@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1412848985-29353-1-git-send-email-ykaneko0929@gmail.com> References: <1412848985-29353-1-git-send-email-ykaneko0929@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141009_030526_329288_7871F9F6 X-CRM114-Status: GOOD ( 12.26 ) X-Spam-Score: 0.1 (/) Cc: Simon Horman , Magnus Damm , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yoshifumi Hosoya Signed-off-by: Yoshifumi Hosoya Signed-off-by: Yoshihiro Kaneko --- arch/arm/boot/dts/r8a7791.dtsi | 21 +++++++++++++-------- include/dt-bindings/clock/r8a7791-clock.h | 8 +++++++- 2 files changed, 20 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index d59d2a8..7a0ca37 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -947,18 +947,23 @@ mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; - clocks = <&m2_clk>, <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, - <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; + clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>, + <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, + <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>, + <&zs_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_PVRSRVKM - R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 - R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 - R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S + R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU + R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_PVRSRVKM + R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1 R8A7791_CLK_FDP0 + R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0 + R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0 + R8A7791_CLK_VSP1_S >; clock-output-names = - "jpu", "tmu1", "pvrsrvkm", "tmu3", "tmu2", "cmt0", "tmu0", - "vsp1-du1", "vsp1-du0", "vsp1-sy"; + "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "pvrsrvkm", + "2ddmac", "fdp1", "fdp0", "tmu3", "tmu2", "cmt0", + "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy"; }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 950250d..4d1617e 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -25,9 +25,15 @@ #define R8A7791_CLK_MSIOF0 0 /* MSTP1 */ -#define R8A7791_CLK_JPU 6 +#define R8A7791_CLK_VCP0 1 +#define R8A7791_CLK_VPC0 3 +#define R8A7791_CLK_JPU 6 +#define R8A7791_CLK_SSP1 9 #define R8A7791_CLK_TMU1 11 #define R8A7791_CLK_PVRSRVKM 12 +#define R8A7791_CLK_2DDMAC 15 +#define R8A7791_CLK_FDP1 18 +#define R8A7791_CLK_FDP0 19 #define R8A7791_CLK_TMU3 21 #define R8A7791_CLK_TMU2 22 #define R8A7791_CLK_CMT0 24