@@ -66,6 +66,42 @@
clocks = <&chip CLKID_TWD>;
};
+ eth1: ethernet@b90000 {
+ compatible = "marvell,pxa168-eth";
+ reg = <0xb90000 0x10000>;
+ clocks = <&chip CLKID_GETH1>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ /* set by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy-handle = <ðphy1>;
+ status = "disabled";
+
+ ethphy1: ethernet-phy@0 {
+ phy-connection-type = "mii";
+ reg = <0>;
+ };
+ };
+
+ eth0: ethernet@e50000 {
+ compatible = "marvell,pxa168-eth";
+ reg = <0xe50000 0x10000>;
+ clocks = <&chip CLKID_GETH0>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ /* set by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy-handle = <ðphy0>;
+ status = "disabled";
+
+ ethphy0: ethernet-phy@0 {
+ phy-connection-type = "mii";
+ reg = <0>;
+ };
+ };
+
apb@e80000 {
compatible = "simple-bus";
#address-cells = <1>;
Marvell BG2CD has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> --- Cc: "David S. Miller" <davem@davemloft.net> Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: netdev@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/berlin2cd.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+)