From patchwork Fri Oct 10 13:24:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 5065421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9CC199F2F1 for ; Fri, 10 Oct 2014 13:40:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C29162022A for ; Fri, 10 Oct 2014 13:40:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D918C20220 for ; Fri, 10 Oct 2014 13:40:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XcaN1-0002SA-Ah; Fri, 10 Oct 2014 13:36:35 +0000 Received: from mail-la0-x22a.google.com ([2a00:1450:4010:c03::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XcaMx-0002Q6-8q for linux-arm-kernel@lists.infradead.org; Fri, 10 Oct 2014 13:36:32 +0000 Received: by mail-la0-f42.google.com with SMTP id mk6so3274464lab.1 for ; Fri, 10 Oct 2014 06:36:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=68KPt0XsZpIernZGHwHjppqtvozdPVxmu9NGxRMjUl0=; b=O9SXoHsXmZwI5pSFpNt9W4C1CKRlpRpmYeJm4yJ9zcNE6+RizuGGH+XQ4a/O7DbVQO HgCev+ZqE1lUKaGC34x2DO147PnvX08RUwu5l4IBYIpJzXIw2BHATzpvi9GAIQH1sQx+ qCC1FnuLNeIMUEtHbvpv78p4ALzmPtH3QE8X3/TDRThJSyuTSbdfz2LQnD0slF4vKNcr /JyTqEbEkiS3QRQNYzVyzNwoPSfor8DL9EjYak/0JkZAvBosFWKgW1q0SbiLlQYON2rz cX6C5U90rvOn2xx3OIVKL6u9cBo7JvMiSaJa3D689DZR8HWNZh28lxSEN0pdWS+3Fz5j r8RQ== X-Received: by 10.152.4.165 with SMTP id l5mr4960345lal.49.1412948166609; Fri, 10 Oct 2014 06:36:06 -0700 (PDT) Received: from localhost.localdomain (ppp91-76-190-157.pppoe.mtu-net.ru. [91.76.190.157]) by mx.google.com with ESMTPSA id ug7sm1827455lac.48.2014.10.10.06.36.05 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 10 Oct 2014 06:36:05 -0700 (PDT) From: Dmitry Osipenko To: swarren@wwwdotorg.org, josephl@nvidia.com, thierry.reding@gmail.com, balbi@ti.com, digetx@gmail.com Subject: [PATCH V3] ARM: tegra: Re-add removed SoC id macro to tegra_resume() Date: Fri, 10 Oct 2014 17:24:47 +0400 Message-Id: <1412947487-24287-1-git-send-email-digetx@gmail.com> X-Mailer: git-send-email 2.1.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141010_063631_497296_E1513245 X-CRM114-Status: UNSURE ( 9.98 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.8 (/) Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Commit d127e9c ("ARM: tegra: make tegra_resume can work with current and later chips") removed tegra_get_soc_id macro leaving used cpu register corrupted after branching to v7_invalidate_l1() and as result causing execution of unintended code on tegra20. Possibly it was expected that r6 would be SoC id func argument since common cpu reset handler is setting r6 before branching to tegra_resume(), but neither tegra20_lp1_reset() nor tegra30_lp1_reset() aren't setting r6 register before jumping to resume function. Fix it by re-adding macro. Fixes: d127e9c (ARM: tegra: make tegra_resume can work with current and later chips) Cc: # v3.13+ Reviewed-by: Felipe Balbi Signed-off-by: Dmitry Osipenko --- V2: added Cc's for lakml and stable, added "Reviewed-by:" Felipe Balbi V3: changed commit description, tested on real hw PS: It wasn't a bug in my emulator :) arch/arm/mach-tegra/reset-handler.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 7b2baab..71be4af 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -51,6 +51,7 @@ ENTRY(tegra_resume) THUMB( it ne ) bne cpu_resume @ no + tegra_get_soc_id TEGRA_APB_MISC_BASE, r6 /* Are we on Tegra20? */ cmp r6, #TEGRA20 beq 1f @ Yes