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Mon, 13 Oct 2014 10:22:33 +0000 Received: from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s9DAM8g7014806; Mon, 13 Oct 2014 03:22:30 -0700 From: Jingchang Lu To: Subject: [PATCHv5 6/6] ARM: imx: Add Freescale LS1021A SMP support Date: Mon, 13 Oct 2014 17:36:03 +0800 Message-ID: <1413192963-11153-7-git-send-email-jingchang.lu@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1413192963-11153-1-git-send-email-jingchang.lu@freescale.com> References: <1413192963-11153-1-git-send-email-jingchang.lu@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(199003)(189002)(97736003)(76176999)(2351001)(229853001)(31966008)(102836001)(48376002)(50466002)(50986999)(77156001)(36756003)(64706001)(104016003)(20776003)(47776003)(105606002)(95666004)(26826002)(85306004)(110136001)(81156004)(106466001)(107046002)(33646002)(80022003)(46102003)(21056001)(62966002)(84676001)(19580405001)(85852003)(76482002)(19580395003)(69596002)(44976005)(89996001)(68736004)(6806004)(50226001)(99396003)(87936001)(87286001)(4396001)(88136002)(92566001)(92726001)(86362001)(93916002)(104166001)(120916001); DIR:OUT; SFP:1102; SCL:1; SRVR:BY2PR03MB475; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BY2PR03MB475; X-Exchange-Antispam-Report-Test: UriScan:; X-Forefront-PRVS: 03630A6A4A Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=jingchang.lu@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141013_112258_682863_23398E98 X-CRM114-Status: GOOD ( 12.62 ) X-Spam-Score: -2.2 (--) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Jingchang Lu , linux-arm-kernel@lists.infradead.org, arnd@arndb.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jingchang Lu Freescale LS1021A SoCs deploy two cortex-A7 processors, this adds bring-up support for the secondary core. Signed-off-by: Jingchang Lu --- arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/mach-ls1021a.c | 1 + arch/arm/mach-imx/platsmp.c | 32 ++++++++++++++++++++++++++++++++ 4 files changed, 35 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index ce137bc..38d75e2 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -89,7 +89,7 @@ obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o obj-$(CONFIG_HAVE_IMX_SRC) += src.o -ifdef CONFIG_SOC_IMX6 +ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_LS1021A),) AFLAGS_headsmp.o :=-Wa,-march=armv7-a obj-$(CONFIG_SMP) += headsmp.o platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 1dabf43..c473ca5 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -157,5 +157,6 @@ static inline void imx_init_l2cache(void) {} #endif extern struct smp_operations imx_smp_ops; +extern struct smp_operations ls1021a_smp_ops; #endif diff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c index 9d2034b..b89c858 100644 --- a/arch/arm/mach-imx/mach-ls1021a.c +++ b/arch/arm/mach-imx/mach-ls1021a.c @@ -17,5 +17,6 @@ static const char * const ls1021a_dt_compat[] __initconst = { }; DT_MACHINE_START(LS1021A, "Freescale LS1021A") + .smp = smp_ops(ls1021a_smp_ops), .dt_compat = ls1021a_dt_compat, MACHINE_END diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 771bd25..69b87ca 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include "common.h" #include "hardware.h" @@ -94,3 +96,33 @@ struct smp_operations imx_smp_ops __initdata = { .cpu_kill = imx_cpu_kill, #endif }; + +#define DCFG_CCSR_SCRATCHRW1 0x200 + +static int ls1021a_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + return 0; +} + +static void __init ls1021a_smp_prepare_cpus(unsigned int max_cpus) +{ + struct device_node *np; + void __iomem *dcfg_base; + unsigned long paddr; + + np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-dcfg"); + dcfg_base = of_iomap(np, 0); + BUG_ON(!dcfg_base); + + paddr = virt_to_phys(secondary_startup); + writel_relaxed(cpu_to_be32(paddr), dcfg_base + DCFG_CCSR_SCRATCHRW1); + + iounmap(dcfg_base); +} + +struct smp_operations ls1021a_smp_ops __initdata = { + .smp_prepare_cpus = ls1021a_smp_prepare_cpus, + .smp_boot_secondary = ls1021a_boot_secondary, +};