@@ -20,6 +20,9 @@ struct pci_sysdata {
#ifdef CONFIG_X86_64
void *iommu; /* IOMMU private data */
#endif
+#ifdef CONFIG_PCI_MSI
+ struct msi_chip *msi_chip;
+#endif
};
extern int pci_routeirq;
@@ -41,6 +44,15 @@ static inline int pci_proc_domain(struct pci_bus *bus)
}
#endif
+#ifdef CONFIG_PCI_MSI
+static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus)
+{
+ struct pci_sysdata *sd = bus->sysdata;
+
+ return sd->msi_chip;
+}
+#endif
+
/* Can be used to override the logic in pci_scan_bus for skipping
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
@@ -101,6 +113,7 @@ void native_teardown_msi_irq(unsigned int irq);
void native_restore_msi_irqs(struct pci_dev *dev);
int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
unsigned int irq_base, unsigned int irq_offset);
+extern struct msi_chip *x86_msi_chip;
#else
#define native_setup_msi_irqs NULL
#define native_teardown_msi_irq NULL
@@ -3227,11 +3227,30 @@ int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
+static int __native_setup_msi_irqs(struct msi_chip *chip,
+ struct pci_dev *dev, int nvec, int type)
+{
+ return native_setup_msi_irqs(dev, nvec, type);
+}
+
void native_teardown_msi_irq(unsigned int irq)
{
irq_free_hwirq(irq);
}
+static void __native_teardown_msi_irq(struct msi_chip *chip,
+ unsigned int irq)
+{
+ native_teardown_msi_irq(irq);
+}
+
+static struct msi_chip native_msi_chip = {
+ .setup_irqs = __native_setup_msi_irqs,
+ .teardown_irq = __native_teardown_msi_irq,
+};
+
+struct msi_chip *x86_msi_chip = &native_msi_chip;
+
#ifdef CONFIG_DMAR_TABLE
static int
dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
@@ -508,6 +508,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
sd = &info->sd;
sd->domain = domain;
+ sd->msi_chip = x86_msi_chip;
sd->node = node;
sd->companion = device;
@@ -468,6 +468,9 @@ void pcibios_scan_root(int busnum)
return;
}
sd->node = x86_pci_root_bus_node(busnum);
+#ifdef CONFIG_PCI_MSI
+ sd->msi_chip = x86_msi_chip;
+#endif
x86_pci_root_bus_resources(busnum, &resources);
printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang <wangyijing@huawei.com> --- arch/x86/include/asm/pci.h | 13 +++++++++++++ arch/x86/kernel/apic/io_apic.c | 19 +++++++++++++++++++ arch/x86/pci/acpi.c | 1 + arch/x86/pci/common.c | 3 +++ 4 files changed, 36 insertions(+), 0 deletions(-)