From patchwork Wed Oct 15 03:07:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 5083611 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D4A049F349 for ; Wed, 15 Oct 2014 02:49:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B4AF020108 for ; Wed, 15 Oct 2014 02:49:21 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 917B3200FE for ; Wed, 15 Oct 2014 02:49:20 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XeEbD-0007k7-Rf; Wed, 15 Oct 2014 02:46:03 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XeEPw-0003a7-Gs for linux-arm-kernel@bombadil.infradead.org; Wed, 15 Oct 2014 02:34:24 +0000 Received: from szxga03-in.huawei.com ([119.145.14.66]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XeEPp-000131-GD for linux-arm-kernel@lists.infradead.org; Wed, 15 Oct 2014 02:34:19 +0000 Received: from 172.24.2.119 (EHLO szxeml412-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id AVO63836; Wed, 15 Oct 2014 10:26:13 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml412-hub.china.huawei.com (10.82.67.91) with Microsoft SMTP Server id 14.3.158.1; Wed, 15 Oct 2014 10:26:05 +0800 From: Yijing Wang To: Bjorn Helgaas Subject: [PATCH v3 27/27] PCI/MSI: Clean up unused MSI arch functions Date: Wed, 15 Oct 2014 11:07:15 +0800 Message-ID: <1413342435-7876-28-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> References: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020209.543DDB46.00EA, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 3221e53762522ff74a1fd3d286b16d71 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141015_033418_534541_8B5B5743 X-CRM114-Status: GOOD ( 24.63 ) X-Spam-Score: -2.6 (--) Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Bharat.Bhushan@freescale.com, Yijing Wang , Thierry Reding , sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Michael Ellerman , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Liviu Dudau , Arnd Bergmann , Konrad Rzeszutek Wilk , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Xinwei Hu , Tony Luck , Sergei Shtylyov , linux-kernel@vger.kernel.org, Ralf Baechle , iommu@lists.linux-foundation.org, David Vrabel , Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" , Lucas Stach X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now we use struct msi_chip in all platforms to configure MSI/MSI-X. We can clean up the unused arch functions. Signed-off-by: Yijing Wang --- Hi Lucas, I dropped the reviewed-by, because this version has a lot changes compared to last one, I guess you may want to check it again. --- drivers/iommu/irq_remapping.c | 2 +- drivers/pci/msi.c | 103 +++++++++++++++-------------------------- include/linux/msi.h | 14 ------ include/linux/pci.h | 8 --- 4 files changed, 39 insertions(+), 88 deletions(-) diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c index 48d57e9..77160a5 100644 --- a/drivers/iommu/irq_remapping.c +++ b/drivers/iommu/irq_remapping.c @@ -92,7 +92,7 @@ error: /* * Restore altered MSI descriptor fields and prevent just destroyed - * IRQs from tearing down again in default_teardown_msi_irqs() + * IRQs from tearing down again in teardown_msi_irqs() */ msidesc->irq = 0; msidesc->nvec_used = 0; diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 5cbd774..b9fefe9 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -28,54 +28,31 @@ int pci_msi_ignore_mask; #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) -/* Arch hooks */ - -int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) -{ - struct msi_chip *chip; - int err; - - chip = pci_msi_chip(dev->bus); - if (!chip || !chip->setup_irq) - return -EINVAL; - - err = chip->setup_irq(chip, dev, desc); - if (err < 0) - return err; - - return 0; -} - -void __weak arch_teardown_msi_irq(unsigned int irq) -{ - struct msi_desc *entry = irq_get_msi_desc(irq); - struct msi_chip *chip = pci_msi_chip(entry->dev->bus); - - if (!chip || !chip->teardown_irq) - return; - - chip->teardown_irq(chip, irq); -} - -int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +int setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { struct msi_desc *entry; int ret; struct msi_chip *chip; chip = pci_msi_chip(dev->bus); - if (chip && chip->setup_irqs) + if (!chip) + return -EINVAL; + + if (chip->setup_irqs) return chip->setup_irqs(chip, dev, nvec, type); /* * If an architecture wants to support multiple MSI, it needs to - * override arch_setup_msi_irqs() + * implement chip->setup_irqs(). */ if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; + if (!chip->setup_irq) + return -EINVAL; + list_for_each_entry(entry, &dev->msi_list, list) { - ret = arch_setup_msi_irq(dev, entry); + ret = chip->setup_irq(chip, dev, entry); if (ret < 0) return ret; if (ret > 0) @@ -85,13 +62,20 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) return 0; } -/* - * We have a default implementation available as a separate non-weak - * function, as it is used by the Xen x86 PCI code - */ -void default_teardown_msi_irqs(struct pci_dev *dev) +static void teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *entry; + struct msi_chip *chip; + + chip = pci_msi_chip(dev->bus); + if (!chip) + return; + + if (chip->teardown_irqs) + return chip->teardown_irqs(chip, dev); + + if (!chip->teardown_irq) + return; list_for_each_entry(entry, &dev->msi_list, list) { int i, nvec; @@ -102,20 +86,10 @@ void default_teardown_msi_irqs(struct pci_dev *dev) else nvec = 1 << entry->msi_attrib.multiple; for (i = 0; i < nvec; i++) - arch_teardown_msi_irq(entry->irq + i); + chip->teardown_irq(chip, entry->irq + i); } } -void __weak arch_teardown_msi_irqs(struct pci_dev *dev) -{ - struct msi_chip *chip = pci_msi_chip(dev->bus); - - if (chip && chip->teardown_irqs) - return chip->teardown_irqs(chip, dev); - - return default_teardown_msi_irqs(dev); -} - static void default_restore_msi_irq(struct pci_dev *dev, int irq) { struct msi_desc *entry; @@ -134,10 +108,18 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq) __write_msi_msg(entry, &entry->msg); } -void __weak arch_restore_msi_irqs(struct pci_dev *dev) +static void default_restore_msi_irqs(struct pci_dev *dev) { - struct msi_chip *chip = pci_msi_chip(dev->bus); + struct msi_desc *entry = NULL; + + list_for_each_entry(entry, &dev->msi_list, list) { + default_restore_msi_irq(dev, entry->irq); + } +} +static void restore_msi_irqs(struct pci_dev *dev) +{ + struct msi_chip *chip = pci_msi_chip(dev->bus); if (chip && chip->restore_irqs) return chip->restore_irqs(chip, dev); @@ -250,15 +232,6 @@ void unmask_msi_irq(struct irq_data *data) msi_set_mask_bit(data, 0); } -void default_restore_msi_irqs(struct pci_dev *dev) -{ - struct msi_desc *entry; - - list_for_each_entry(entry, &dev->msi_list, list) { - default_restore_msi_irq(dev, entry->irq); - } -} - void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { BUG_ON(entry->dev->current_state != PCI_D0); @@ -376,7 +349,7 @@ static void free_msi_irqs(struct pci_dev *dev) BUG_ON(irq_has_action(entry->irq + i)); } - arch_teardown_msi_irqs(dev); + teardown_msi_irqs(dev); list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { if (entry->msi_attrib.is_msix) { @@ -435,7 +408,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev) pci_intx_for_msi(dev, 0); msi_set_enable(dev, 0); - arch_restore_msi_irqs(dev); + restore_msi_irqs(dev); pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap), @@ -458,7 +431,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev) msix_clear_and_set_ctrl(dev, 0, PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); - arch_restore_msi_irqs(dev); + restore_msi_irqs(dev); list_for_each_entry(entry, &dev->msi_list, list) { msix_mask_irq(entry, entry->masked); } @@ -628,7 +601,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) list_add_tail(&entry->list, &dev->msi_list); /* Configure MSI capability structure */ - ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); + ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); if (ret) { msi_mask_irq(entry, mask, ~mask); free_msi_irqs(dev); @@ -743,7 +716,7 @@ static int msix_capability_init(struct pci_dev *dev, if (ret) return ret; - ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); + ret = setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); if (ret) goto out_avail; diff --git a/include/linux/msi.h b/include/linux/msi.h index eb5ae36..65b0927 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -52,20 +52,6 @@ struct msi_desc { struct msi_msg msg; }; -/* - * The arch hooks to setup up msi irqs. Those functions are - * implemented as weak symbols so that they /can/ be overriden by - * architecture specific code if needed. - */ -int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); -void arch_teardown_msi_irq(unsigned int irq); -int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); -void arch_teardown_msi_irqs(struct pci_dev *dev); -void arch_restore_msi_irqs(struct pci_dev *dev); - -void default_teardown_msi_irqs(struct pci_dev *dev); -void default_restore_msi_irqs(struct pci_dev *dev); - struct msi_chip { struct module *owner; struct device *dev; diff --git a/include/linux/pci.h b/include/linux/pci.h index 7a48b40..b28cc03 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1433,14 +1433,6 @@ static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } #include -/* Just avoid compile error, will be clean up later */ -#ifdef CONFIG_PCI_MSI - -#ifndef pci_msi_chip -#define pci_msi_chip(bus) NULL -#endif - -#endif /* these helpers provide future and backwards compatibility * for accessing popular PCI BAR info */