From patchwork Wed Oct 22 13:12:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?RWRkaWUgSHVhbmcgKOm7g+aZuuWCkSk=?= X-Patchwork-Id: 5131931 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D7C57C11AC for ; Wed, 22 Oct 2014 13:16:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E9F32201DD for ; Wed, 22 Oct 2014 13:16:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E5B2920136 for ; Wed, 22 Oct 2014 13:16:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xgvip-0001iz-Rq; Wed, 22 Oct 2014 13:13:03 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xgvin-0001hU-LE for linux-arm-kernel@lists.infradead.org; Wed, 22 Oct 2014 13:13:02 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1751632383; Wed, 22 Oct 2014 21:12:41 +0800 Received: from mtkslt208.mediatek.inc (10.21.15.95) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Wed, 22 Oct 2014 21:12:41 +0800 From: Eddie Huang To: Rob Herring , Matthias Brugger , Greg Kroah-Hartman Subject: [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135 Date: Wed, 22 Oct 2014 21:12:08 +0800 Message-ID: <1413983529-21887-3-git-send-email-eddie.huang@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1413983529-21887-1-git-send-email-eddie.huang@mediatek.com> References: <1413983529-21887-1-git-send-email-eddie.huang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141022_061301_904800_2CE64724 X-CRM114-Status: UNSURE ( 7.84 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.3 (+) Cc: Mark Rutland , devicetree@vger.kernel.org, Russell King , srv_heupstream@mediatek.com, Pawel Moll , Ian Campbell , hc.yen@mediatek.com, yh.chen@mediatek.com, linux-kernel@vger.kernel.org, nathan.chung@mediatek.com, linux-serial@vger.kernel.org, Kumar Gala , Eddie Huang , Jiri Slaby , Sascha Hauer , linux-arm-kernel@lists.infradead.org, Alan Cox X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This add dts support for mt8127 and mt8135 SOC UART Signed-off-by: Eddie Huang --- arch/arm/boot/dts/mt8127.dtsi | 34 ++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/mt8135.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi index 25c9f69..249c218 100644 --- a/arch/arm/boot/dts/mt8127.dtsi +++ b/arch/arm/boot/dts/mt8127.dtsi @@ -64,6 +64,12 @@ clock-frequency = <32000>; #clock-cells = <0>; }; + + uart_clk: dummy26m { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; }; soc { @@ -89,5 +95,33 @@ <0 0x10214000 0 0x2000>, <0 0x10216000 0 0x2000>; }; + + uart0: serial@11006000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11002000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; + + uart1: serial@11007000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11003000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; + + uart2: serial@11008000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11004000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; + + uart3: serial@11009000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11005000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; }; }; diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 90a56ad..683b761 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -86,6 +86,13 @@ clock-frequency = <32000>; #clock-cells = <0>; }; + + uart_clk: dummy26m { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; + }; soc { @@ -111,5 +118,34 @@ <0 0x10214000 0 0x2000>, <0 0x10216000 0 0x2000>; }; + + uart0: serial@11006000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11006000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; + + uart1: serial@11007000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11007000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; + + uart2: serial@11008000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11008000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; + + uart3: serial@11009000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11009000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; + }; };